LTC3414EFE#PBF Datasheet LTC3414IFE#TRPBF, LTC3414MPFE#TRPBF, LTC3414EFE#TRPBF | P7-P9

LTC3414

3414fb

ing harmonics out of a signal band. The output voltage

ripple is minimized in this mode.

Burst Mode Operation

Connecting the SYNC/MODE pin to a voltage in the range

of 0V to 1V enables Burst Mode operation. In Burst Mode

operation, the internal power MOSFETs operate intermit-

tently at light loads. This increases efficiency by minimiz-

ing switching losses. During Burst Mode operation, the

minimum peak inductor current is externally set by the

voltage on the SYNC/MODE pin and the voltage on the I

pin is monitored by the burst comparator to determine

when sleep mode is enabled and disabled. When the

average inductor current is greater than the load current,

the voltage on the I

pin drops. As the I

voltage falls

below 150mV, the burst comparator trips and enables

sleep mode. During sleep mode, the top power MOSFET is

held off and the I

pin is disconnected from the output of

the error amplifier. The majority of the internal circuitry is

also turned off to reduce the quiescent current to 64μA

while the load current is solely supplied by the output

capacitor. When the output voltage drops, the I

pin is

reconnected to the output of the error amplifier and the top

power MOSFET along with all the internal circuitry is

switched back on. This process repeats at a rate that is

dependent on the load demand.

Pulse Skipping operation is implemented by connecting

the SYNC/MODE pin to ground. This forces the burst

clamp level to be at 0V. As the load current decreases, the

peak inductor current will be determined by the voltage on

the I

pin until the I

voltage drops below 400mV. At this

point, the peak inductor current is determined by the

minimum on-time of the current comparator. If the load

demand is less than the average of the minimum on-time

inductor current, switching cycles will be skipped to keep

the output voltage in regulation.

Frequency Synchronization

The internal oscillator of the LTC3414 can be synchronized

to an external clock connected to the SYNC/MODE pin. The

frequency of the external clock can be in the range of

300kHz to 4MHz. For this application, the oscillator timing

resistor should be chosen to correspond to a frequency

that is 25% lower than the synchronization frequency.

During synchronization, the burst clamp is set to 0V, and

each switching cycle begins at the falling edge of the clock

signal.

Dropout Operation

When the input supply voltage decreases toward the

output voltage, the duty cycle increases toward the maxi-

mum on-time. Further reduction of the supply voltage

forces the main switch to remain on for more than one

cycle eventually reaching 100% duty cycle. The output

voltage will then be determined by the input voltage minus

the voltage drop across the internal P-channel MOSFET

and the inductor.

Low Supply Operation

The LTC3414 is designed to operate down to an input

supply voltage of 2.25V. One important consideration

at low input supply voltages is that the R

DS(ON)

of the

P-channel and N-channel power switches increases. The

user should calculate the power dissipation when the

LTC3414 is used at 100% duty cycle with low input

voltages to ensure that thermal limits are not exceeded.

Slope Compensation and Inductor Peak Current

Slope compensation provides stability in constant fre-

quency architectures by preventing subharmonic oscilla-

tions at duty cycles greater than 50%. It is accomplished

internally by adding a compensating ramp to the inductor

current signal at duty cycles in excess of 40%. Normally,

the maximum inductor peak current is reduced when

slope compensation is added. In the LTC3414, however,

slope compensation recovery is implemented to keep the

maximum inductor peak current constant throughout the

range of duty cycles. This keeps the maximum output

current relatively constant regardless of duty cycle.

Short-Circuit Protection

When the output is shorted to ground, the inductor current

decays very slowly during a single switching cycle. To

prevent current runaway from occurring, a secondary

current limit is imposed on the inductor current. If the

inductor valley current increases larger than 7.8A, the top

power MOSFET will be held off and switching cycles will be

skipped until the inductor current is reduced.

OPERATIO

LTC3414

3414fb

The basic LTC3414 application circuit is shown in Figure 1.

External component selection is determined by the maxi-

mum load current and begins with the selection of the

operating frequency and inductor value followed by C

and C

OUT

Operating Frequency

Selection of the operating frequency is a tradeoff between

efficiency and component size. High frequency operation

allows the use of smaller inductor and capacitor values.

Operation at lower frequencies improves efficiency by

reducing internal gate charge losses but requires larger

inductance values and/or capacitance to maintain low

output ripple voltage.

The operating frequency of the LTC3414 is determined by

an external resistor that is connected between pin R

and

ground. The value of the resistor sets the ramp current that

is used to charge and discharge an internal timing capaci-

tor within the oscillator and can be calculated by using the

following equation:

OSC

= Ω

()

308 10

.•

–

Although frequencies as high as 4MHz are possible, the

minimum on-time of the LTC3414 imposes a minimum

limit on the operating duty cycle. The minimum on-time is

typically 110ns; therefore, the minimum duty cycle is

equal to 100 • 110ns • f(Hz).

Inductor Selection

For a given input and output voltage, the inductor value

and operating frequency determine the ripple current. The

ripple current ΔI

increases with higher V

or V

OUT

and

decreases with higher inductance.

Δ =

⎛

⎝

⎜

⎞

⎠

⎟

⎛

⎝

⎜

⎞

⎠

⎟

f • L

OUT OUT

1–

Having a lower ripple current reduces the core losses in

the inductor, the ESR losses in the output capacitors, and

the output voltage ripple. Highest efficiency operation is

achieved at low frequency with small ripple current. This,

however, requires a large inductor.

A reasonable starting point for selecting the ripple current

is ΔI

= 0.4(I

MAX

). The largest ripple current occurs at the

highest V

. To guarantee that the ripple current stays

below a specified maximum, the inductor value should be

chosen according to the following equation:

OUT

L MAX

OUT

IN MAX

⎛

⎝

⎜

⎞

⎠

⎟

⎛

⎝

⎜

⎞

⎠

⎟

() ()

–1

The inductor value will also have an effect on Burst Mode

operation. The transition to low current operation begins

when the peak inductor current falls below a level set by

the burst clamp. Lower inductor values result in higher

ripple current which causes this to occur at lower load

currents. This causes a dip in efficiency in the upper range

of low current operation. In Burst Mode operation, lower

inductance values will cause the burst frequency to in-

crease.

Inductor Core Selection

Once the value for L is known, the type of inductor must be

selected. Actual core loss is independent of core size for a

fixed inductor value, but it is very dependent on the

inductance selected. As the inductance increases, core

losses decrease. Unfortunately, increased inductance re-

quires more turns of wire and therefore copper losses will

increase.

Ferrite designs have very low core losses and are preferred

at high switching frequencies, so design goals can con-

centrate on copper loss and preventing saturation. Ferrite

core material saturates “hard,” which means that induc-

tance collapses abruptly when the peak design current is

exceeded. This results in an abrupt increase in inductor

ripple current and consequent output voltage ripple. Do

not allow the core to saturate!

Different core materials and shapes will change the size/

current and price/current relationship of an inductor.

Toroid or shielded pot cores in ferrite or permalloy mate-

rials are small and don’t radiate much energy, but gener-

ally cost more than powdered iron core inductors with

similar characteristics. The choice of which style inductor

to use mainly depends on the price verus size require-

ments and any radiated field/EMI requirements. New

designs for surface mount inductors are available from

Coiltronics, Coilcraft, Toko, and Sumida.

APPLICATIO S I FOR ATIO

WUUU

LTC3414

3414fb

and C

OUT

Selection

The input capacitance, C

, is needed to filter the trapezoi-

dal wave current at the source of the top MOSFET. To

prevent large voltage transients from occurring, a low ESR

input capacitor sized for the maximum RMS current

should be used. The maximum RMS current is given by:

RMS OUT MAX

OUT

()

–1

This formula has a maximum at V

= 2V

OUT

, where

RMS

= I

OUT/2

. This simple worst-case condition is com-

monly used for design because even significant deviations

do not offer much relief. Note that ripple current ratings

from capacitor manufacturers are often based on only

2000 hours of life which makes it advisable to further

derate the capacitor, or choose a capacitor rated at a

higher temperature than required. Several capacitors may

also be paralleled to meet size or height requirements in

the design. For low input voltage applications, sufficient

bulk input capacitance is needed to minimize transient

effects during output load changes.

The selection of C

OUT

is determined by the effective series

resistance (ESR) that is required to minimize voltage

ripple and load step transients as well as the amount of

bulk capacitance that is necessary to ensure that the

control loop is stable. Loop stability can be checked by

viewing the load transient response as described in a later

section. The output ripple, ΔV

OUT

, is determined by:

Δ≤Δ +V I ESR

OUT L

OUT

⎞

⎠

⎟

⎛

⎝

⎜

The output ripple is highest at maximum input voltage

since ΔI

increases with input voltage. Multiple capacitors

placed in parallel may be needed to meet the ESR and RMS

current handling requirements. Dry tantalum, special poly-

mer, aluminum electrolytic, and ceramic capacitors are all

available in surface mount packages. Special polymer

capacitors offer very low ESR but have lower capacitance

density than other types. Tantalum capacitors have the

highest capacitance density but it is important to only use

types that have been surge tested for use in switching

power supplies. Aluminum electrolytic capacitors have

significantly higher ESR, but can be used in cost-sensitive

applications provided that consideration is given to ripple

current ratings and long term reliability. Ceramic capaci-

tors have excellent low ESR characteristics but can have a

high voltage coefficient and audible piezoelectric effects.

The high Q of ceramic capacitors with trace inductance

can also lead to significant ringing.

Using Ceramic Input and Output Capacitors

Higher values, lower cost ceramic capacitors are now

becoming available in smaller case sizes. Their high ripple

current, high voltage rating and low ESR make them ideal

for switching regulator applications. However, care must

be taken when these capacitors are used at the input and

output. When a ceramic capacitor is used at the input and

the power is supplied by a wall adapter through long wires,

a load step at the output can induce ringing at the input,

. At best, this ringing can couple to the output and be

mistaken as loop instability. At worst, a sudden inrush of

current through the long wires can potentially cause a

voltage spike at V

large enough to damage the part.

When choosing the input and output ceramic capacitors,

choose the X5R or X7R dielectric formulations. These

dielectrics have the best temperature and voltage charac-

teristics of all the ceramics for a given value and size.

Output Voltage Programming

The output voltage is set by an external resistive divider

according to the following equation:

OUT

⎛

⎝

⎜

⎞

⎠

⎟

08 1

The resistive divider allows pin V

to sense a fraction of

the output voltage as shown in Figure 2.

APPLICATIO S I FOR ATIO

WUUU

3414 F02

LTC3414

SGND

OUT

Figure 2. Setting the Output Voltage

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