__________Applications Information
Power-Supply Considerations
The MAX4524/MAX4525s construction is typical of
most CMOS analog switches. They have two supply
pins: V+ and GND. V+ and GND are used to drive the
internal CMOS switches and set the limits of the analog
voltage on any switch. Reverse ESD-protection diodes
are internally connected between each analog signal
pin and both V+ and GND. If any analog signal
exceeds V+ or GND, one of these diodes will conduct.
During normal operation, these (and other) reverse-
biased ESD diodes leak, forming the only current drawn
from V+ or GND.
Virtually all the analog leakage current comes from the
ESD diodes. Although the ESD diodes on a given sig-
nal pin are identical, and therefore fairly well balanced,
they are reverse-biased differently. Each is biased by
either V+ or GND and the analog signal. This means
that leakage will vary as the signal varies. The differ-
ence in the two diode leakages to the V+ and GND
pins constitutes the analog signal-path leakage current.
All analog leakage current flows between each pin and
one of the supply terminals, not to the other switch ter-
minal. This is why both sides of a given switch can
show leakage currents of either the same or opposite
polarity.
MAX4524/MAX4525
Low-Voltage, Single-Supply
Multiplexer and Switch
_______________________________________________________________________________________ 7
______________________________________________Test Circuits/Timing Diagrams
50%
t
TRANS
V+
0V
V
NO0
V
OUT
V
ADD
0V
90%
90%
t
TRANS
50%
t
TRANS
V+
0V
V
NC
V
OUT
V
ADD
0V
90%
90%
t
TRANS
V
ADD
V+
V
OUT
GND
V+
ADDB
ADDA
INH
NO0
NO1NO2
NO3
COM
V+
MAX4524
300
50
35pF
V+
V
OUT
GND
V+
ADD
V
ADD
INH
NO
NC
COM
V+
MAX4525
300
50
35pF
REPEAT TEST FOR EACH SECTION.
Figure 1. Address Transition Time
MAX4524/MAX4525
There is no connection between the analog signal
paths and GND. V+ and GND power the internal logic
and logic-level translators, and set both the input and
output logic limits. The logic-level translators convert
the logic levels into switched V+ and GND signals to
drive the gates of the analog signals. This drive signal
is the only connection between the logic supplies (and
signals) and the analog supplies. V+ has an ESD-pro-
tection diode to GND.
Low-Voltage Operation
These devices operate from a single supply between
+2V and +12V. At room temperature, they actually
work with a single supply at near or below +1.7V,
although as supply voltage decreases, switch on-resis-
tance and switching times become very high.
High-Frequency Performance
In 50 systems, signal response is reasonably flat up
to 50MHz (see Typical Operating Characteristics).
Above 20MHz, the on-response has several minor
peaks, which are highly layout dependent. The problem
is not turning the switch on, but turning it off. The off-
state switch acts like a capacitor, and passes higher
frequencies with less attenuation. At 10MHz, off-isola-
tion is about -50dB in 50 systems, becoming worse
(approximately 20dB per decade) as frequency
increases. Higher circuit impedances also degrade off-
isolation. Adjacent channel attenuation is about 3dB
above that of a bare IC socket, and is entirely due to
capacitive coupling.
Low-Voltage, Single-Supply
Multiplexer and Switch
8 _______________________________________________________________________________________
_________________________________Test Circuits/Timing Diagrams (continued)
50%
t
OFF
V+
0V
V
NO0
V
OUT
V
INH
0V
90%
90%
t
ON
50%
t
OFF
V+
0V
V
NO_
V
OUT
V
INH
0V
90%
90%
t
ON
V
INH
V
INH
V+
V
OUT
GND
V+
ADDB
ADDA
INH
NO0
NO1NO3
COM
V+
MAX4524
300
50
35pF
V+
V
OUT
GND
V+
ADD
INH
NO_
NC_
COM_
V+
MAX4525
300
35pF
50
REPEAT TEST FOR EACH SECTION.
Figure 2. Inhibit Switching Times
MAX4524/MAX4525
Low-Voltage, Single-Supply
Multiplexer and Switch
_______________________________________________________________________________________ 9
50%
V+
0V
V
COM
V
OUT
V
ADD
0V
80%
t
BBM
V+
V
OUT
V
OUT
V
ADD
V
ADD
GND
V+
ADDB
ADDA
INH
NO0N03
COM
V+
MAX4524
300
50
35pF
V+
GND
V+
ADD
INH
NO_, NC_
COM_
V+
MAX4525
300
35pF
50
REPEAT TEST FOR EACH SECTION.
t
R
< 20ns
t
F
< 20ns
Figure 3. Break-Before-Make Interval
0V
V+
V
INH
V
OUT
IS THE MEASURED VOLTAGE DUE TO CHARGE-
TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF.
V
OUT
REPEAT TEST FOR EACH SECTION.
Q = V
OUT
X C
L
V
OUT
V+
V
OUT
V
NO
= 0V
V
INH
GND
V+
ADDB
CHANNEL
SELECT
ADDA
INH
NO_
COM_
MAX4524
MAX4525
50
C
L
1000pF
_________________________________Test Circuits/Timing Diagrams (continued)
Figure 4. Charge Injection

MAX4524CUB+TGA7

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Multiplexer Switch ICs Low-Voltage, Single-Supply Multiplexer and Switch
Lifecycle:
New from this manufacturer.
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