Philips Semiconductors Product specification
74ALVCH16821
20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
1998 May 29
6
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT
MIN TYP
1
MAX
V
HIGH level In
p
ut voltage
V
CC
= 2.3 to 2.7V 1.7 1.2
V
V
IH
HIGH
le
v
el
Inp
u
t
v
oltage
V
CC
= 2.7 to 3.6V 2.0 1.5
V
V
LOW level In
p
ut voltage
V
CC
= 2.3 to 2.7V 1.2 0.7
V
V
IL
LOW
le
v
el
Inp
u
t
v
oltage
V
CC
= 2.7 to 3.6V 1.5 0.8
V
V
CC
=23to36V
;
V =V or V
;
I
O
= 100µA
V
CC
02
V
CC
V
CC
=
2
.
3
to
3
.
6V
;
V
I
=
V
IH
or
V
IL
;
I
O
= –
100
µ
A
V
CC
0
.
2
V
CC
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= –6mA V
CC
0.3 V
CC
0.08
V
O
HIGH level out
p
ut voltage
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= –12mA V
CC
0.6 V
CC
0.26
V
V
OH
HIGH
le
v
el
o
u
tp
u
t
v
oltage
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= –12mA V
CC
0.5 V
CC
0.14
V
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= –12mA V
CC
0.6 V
CC
0.09
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= –24mA V
CC
1.0 V
CC
0.28
V =23to36V
;
V =V or V
;
I = 100µA
GND
020
V
V
CC
=
2
.
3
to
3
.
6V
;
V
I
=
V
IH
or
V
IL
;
I
O
=
100
µ
A
GND
0
.
20
V
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= 6mA 0.07 0.40 V
V
OL
LOW level output voltage
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= 12mA 0.15 0.70
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA 0.14 0.40
V
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA 0.27 0.55
V
CC
=23to36V
;
I
I
Input leakage current
V
CC
=
2
.
3
to
3
.
6V
;
V V or GND
0.1 5
µ
A
I
g
V
I
=
V
CC
or
GND
µ
I
OZ
3-State output OFF-state current
V
CC
= 2.7 to 3.6V; V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND
0.1 10 µA
I
CC
Quiescent supply current V
CC
= 2.3 to 3.6V; V
I
= V
CC
or GND; I
O
= 0 0.2 40 µA
I
CC
Additional quiescent supply current V
CC
= 2.3V to 3.6V; V
I
= V
CC
– 0.6V; I
O
= 0 150 750 µA
I
Bus hold LOW sustaining current
V
CC
= 2.3V; V
I
= 0.7V
2
45
µA
I
BHL
B
u
s
hold
LOW
s
u
staining
c
u
rrent
V
CC
= 3.0V; V
I
= 0.8V
2
75 150
µ
A
I
Bus hold HIGH sustaining current
V
CC
= 2.3V; V
I
= 1.7V
2
–45
µA
I
BHH
B
u
s
hold
HIGH
s
u
staining
c
u
rrent
V
CC
= 3.0V; V
I
= 2.0V
2
–75 –175
µ
A
I
BHLO
Bus hold LOW overdrive current V
CC
= 3.6V
2
500 µA
I
BHHO
Bus hold HIGH overdrive current V
CC
= 3.6V
2
–500 µA
NOTES:
1. All typical values are at T
amb
= 25°C.
2. Valid for data inputs of bus hold parts.
Philips Semiconductors Product specification
74ALVCH16821
20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
1998 May 29
7
AC CHARACTERISTICS FOR V
CC
= 2.3V TO 2.7V RANGE
GND = 0V; t
r
= t
f
2.0ns; C
L
= 30pF
LIMITS
SYMBOL PARAMETER WAVEFORM V
CC
= 2.5V ± 0.2V UNIT
MIN TYP
1
MAX
t
PLH
/t
PHL
Propagation delay
nCP to nQ
n
1, 4 1.0 2.6 5.8 ns
t
PZH
/t
PZL
3-State output enable time
nOE
n
to nQ
n
2, 4 1.0 2.8 6.6 ns
t
PHZ
/t
PLZ
3-State output disable time
nOE
n
to nQ
n
2, 4 1.0 2.2 5.7 ns
t
W
nCP pulse width HIGH or LOW 3, 4 3.0 1.8 ns
t
SU
Set up time nD
n
to nCP 3, 4 1.4 0.3 ns
t
h
Hold time nD
n
to nCP 3, 4 0.4 0.0 ns
F
max
Maximum clock pulse frequency 1, 4 150 250 MHz
NOTE:
1. All typical values are at V
CC
= 2.5V and T
amb
= 25°C.
AC CHARACTERISTICS FOR V
CC
= 3.0V TO 3.6V RANGE AND V
CC
= 2.7V
GND = 0V; t
r
= t
f
2.5ns; C
L
= 50pF
LIMITS
SYMBOL PARAMETER WAVEFORM V
CC
= 3.3 ± 0.3V V
CC
= 2.7V UNIT
MIN TYP
1
MAX MIN TYP
1
MAX
t
PHL
/t
PLH
Propagation delay
nCP to nQ
n
1, 4 1.0 2.5 4.5 1.0 2.8 5.3 ns
t
PZH
/t
PZL
3-State output enable time
nOE
n
to nQ
n
2, 4 1.0 2.3 5.1 1.0 3.2 6.2 ns
t
PHZ
/t
PLZ
3-State output disable time
nOE
n
to nQ
n
2, 4 1.0 2.8 4.6 1.0 3.1 5.0 ns
t
W
nCP pulse width HIGH or
LOW
3, 4 3.3 0.2 3.3 1.7 ns
t
SU
Set up time nD
n
to nCP 3, 4 1.0 0.2 1.2 0.3 ns
t
h
Hold time nD
n
to nCP 3, 4 0.8 0.4 0.6 –0.3 ns
F
max
Maximum clock pulse
frequency
1, 4 150 350 150 300 MHz
NOTES:
1. All typical values are at T
amb
= 25°C.
Philips Semiconductors Product specification
74ALVCH16821
20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
1998 May 29
8
AC WAVEFORMS
V
CC
= 2.3 TO 2.7 V RANGE
1. V
M
= 0.5 V
2. V
X
= V
OL
+ 0.15V
3. V
Y
= V
OH
– 0.15V
4. V
I
= V
CC
5. V
OL
and V
OH
are the typical output voltage drop that occur with
the output load.
V
CC
= 3.0 TO 3.6 V RANGE AND V
CC
= 2.7 V
1. V
M
= 1.5 V
2. V
X
= V
OL
+ 0.3V
3. V
Y
= V
OH
– 0.3V
4. V
I
= 2.7 V
5. V
OL
and V
OH
are the typical output voltage drop that occur with
the output load.
V
M
nCP INPUT
nQ
n
OUTPUT
t
w
t
PHL
V
M
t
PLH
1/f
MAX
V
M
V
OH
V
OL
SH00128
V
I
GND
Waveform 1. The input (nCP) to output propagation delays.
t
PLZ
t
PZL
V
I
nOE INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
t
PHZ
V
M
V
M
V
M
t
PZH
V
X
V
Y
SW00308
Waveform 2. The 3-State enable and disable times.
nQ
n
OUTPUT
V
M
V
M
nD
n
INPUT
SH00129
nCP INPUT
V
M
GND
V
I
GND
V
I
V
OL
V
OH
t
su
t
su
t
h
t
h
Waveform 3. Set up and hold times.
TEST CIRCUIT
SWITCH POSITION
PULSE
GENERATOR
R
T
V
I
D.U.T.
V
O
C
L
V
CC
R
L
= 500
Test Circuit for switching times
Open
GND
S
1
DEFINITIONS
V
CC
V
I
< 2.7V V
CC
TEST S
1
t
PLH/
t
PHL
Open
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
2 V
CC
t
PLZ/
t
PZL
2.7V2.7–3.6V
t
PHZ/
t
PZH
GND
R
L
= 500
2 * V
CC
SV00906
Waveform 4. Load circuitry for switching times

74ALVCH16821DGGS

Mfr. #:
Manufacturer:
Nexperia
Description:
Flip Flops 20-Bit Bus-Interface D-Type, Flip-Flop
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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