Philips Semiconductors Product specification
74ALVCH16821
20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
1998 May 29
7
AC CHARACTERISTICS FOR V
CC
= 2.3V TO 2.7V RANGE
GND = 0V; t
r
= t
f
≤ 2.0ns; C
L
= 30pF
LIMITS
SYMBOL PARAMETER WAVEFORM V
CC
= 2.5V ± 0.2V UNIT
MIN TYP
1
MAX
t
PLH
/t
PHL
Propagation delay
nCP to nQ
n
1, 4 1.0 2.6 5.8 ns
t
PZH
/t
PZL
3-State output enable time
nOE
n
to nQ
n
2, 4 1.0 2.8 6.6 ns
t
PHZ
/t
PLZ
3-State output disable time
nOE
n
to nQ
n
2, 4 1.0 2.2 5.7 ns
t
W
nCP pulse width HIGH or LOW 3, 4 3.0 1.8 ns
t
SU
Set up time nD
n
to nCP 3, 4 1.4 0.3 ns
t
h
Hold time nD
n
to nCP 3, 4 0.4 0.0 ns
F
max
Maximum clock pulse frequency 1, 4 150 250 MHz
NOTE:
1. All typical values are at V
CC
= 2.5V and T
amb
= 25°C.
AC CHARACTERISTICS FOR V
CC
= 3.0V TO 3.6V RANGE AND V
CC
= 2.7V
GND = 0V; t
r
= t
f
≤ 2.5ns; C
L
= 50pF
LIMITS
SYMBOL PARAMETER WAVEFORM V
CC
= 3.3 ± 0.3V V
CC
= 2.7V UNIT
MIN TYP
1
MAX MIN TYP
1
MAX
t
PHL
/t
PLH
Propagation delay
nCP to nQ
n
1, 4 1.0 2.5 4.5 1.0 2.8 5.3 ns
t
PZH
/t
PZL
3-State output enable time
nOE
n
to nQ
n
2, 4 1.0 2.3 5.1 1.0 3.2 6.2 ns
t
PHZ
/t
PLZ
3-State output disable time
nOE
n
to nQ
n
2, 4 1.0 2.8 4.6 1.0 3.1 5.0 ns
t
W
nCP pulse width HIGH or
LOW
3, 4 3.3 0.2 3.3 1.7 ns
t
SU
Set up time nD
n
to nCP 3, 4 1.0 0.2 1.2 0.3 ns
t
h
Hold time nD
n
to nCP 3, 4 0.8 0.4 0.6 –0.3 ns
F
max
Maximum clock pulse
frequency
1, 4 150 350 150 300 MHz
NOTES:
1. All typical values are at T
amb
= 25°C.