M48T02, M48T12 DC and AC parameters
Doc ID 2410 Rev 9 19/25
Table 9. DC characteristics
Figure 12. Power down/up mode AC waveforms
Note: Inputs may or may not be recognized at this time. Caution should be taken to keep E
high as
V
CC
rises past V
PFD
(min). Some systems may perform inadvertent WRITE cycles after V
CC
rises above V
PFD
(min) but before normal system operations begin. Even though a power on
reset is being applied to the processor, a reset condition may not occur until after the system
clock is running.
Symbol Parameter Test condition
(1)
1. Valid for ambient operating temperature: T
A
= 0 to 70 °C; V
CC
= 4.75 to 5.5 V or 4.5 to 5.5 V (except where noted).
Min Max Unit
I
LI
Input leakage current 0V V
IN
V
CC
±1 µA
I
LO
(2)
2. Outputs deselected.
Output leakage current 0V V
OUT
V
CC
±1 µA
I
CC
Supply current Outputs open 80 mA
I
CC1
(3)
3. Measured with control bits set as follows: R = '1'; W, ST, FT = '0.'
Supply current (standby) TTL E = V
IH
3mA
I
CC2
(3)
Supply current (standby) CMOS E = V
CC
– 0.2 V 3 mA
V
IL
Input low voltage –0.3 0.8 V
V
IH
Input high voltage 2.2 V
CC
+ 0.3 V
V
OL
Output low voltage I
OL
= 2.1 mA 0.4 V
V
OH
Output high voltage I
OH
= –1 mA 2.4 V
AI00606
V
CC
INPUTS
(PER CONTROL INPUT)
OUTPUTS
DON'T CARE
HIGH-Z
tF
tFB
tR
trectPD tRB
tDR
VALID VALID
NOTE
(PER CONTROL INPUT)
RECOGNIZEDRECOGNIZED
V
PFD
(max)
V
PFD
(min)
V
SO
DC and AC parameters M48T02, M48T12
20/25 Doc ID 2410 Rev 9
Table 10. Power down/up AC characteristics
Table 11. Power down/up trip points DC characteristics
Symbol Parameter
(1)
1. Valid for ambient operating temperature: T
A
= 0 to 70 °C; V
CC
= 4.75 to 5.5 V or 4.5 to 5.5 V (except where
noted).
Min Max Unit
t
PD
E or W at V
IH
before power down 0 - µs
t
F
(2)
2. V
PFD
(max) to V
PFD
(min) fall time of less than t
F
may result in deselection/write protection not occurring
until 200 µs after V
CC
passes V
PFD
(min).
V
PFD
(max) to V
PFD
(min) V
CC
fall time 300 - µs
t
FB
(3)
3. V
PFD
(min) to V
SS
fall time of less than t
FB
may cause corruption of RAM data.
V
PFD
(min) to V
SS
V
CC
fall time 10 - µs
t
R
V
PFD
(min) to V
PFD
(max) V
CC
rise time 0 - µs
t
RB
V
SS
to V
PFD
(min) V
CC
rise time 1 - µs
t
rec
E or W at V
IH
before power-up 2 - ms
Symbol Parameter
(1)(2)
1. All voltages referenced to V
SS
.
2. Valid for ambient operating temperature: T
A
= 0 to 70 °C; V
CC
= 4.75 to 5.5 V or 4.5 to 5.5 V (except where
noted).
Min Typ Max Unit
V
PFD
Power-fail deselect voltage
M48T02 4.5 4.6 4.75 V
M48T12 4.2 4.3 4.5 V
V
SO
Battery backup switchover voltage 3.0 V
t
DR
(3)
3. At 25 °C; V
CC
= 0 V.
Expected data retention time 10 YEARS
M48T02, M48T12 Package mechanical data
Doc ID 2410 Rev 9 21/25
6 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Figure 13. PCDIP24 – 24-pin plastic DIP, battery CAPHAT™, package outline
Note: Drawing is not to scale.
Table 12. PCDIP24 – 24-pin plastic DIP, battery CAPHAT™, package mech. data
PCDIP
A2
A1
A
L
B1 B
e1
D
E
N
1
C
eA
e3
Symb
mm inches
Typ Min Max Typ Min Max
A 8.89 9.65 0.350 0.380
A1 0.38 0.76 0.015 0.030
A2 8.38 8.89 0.330 0.350
B 0.38 0.53 0.015 0.021
B1 1.14 1.78 0.045 0.070
C 0.20 0.31 0.008 0.012
D 34.29 34.80 1.350 1.370
E 17.83 18.34 0.702 0.722
e1 2.29 2.79 0.090 0.110
e3 27.94 1.1
eA 15.24 16.00 0.600 0.630
L 3.05 3.81 0.120 0.150
N24 24

M48T02-70PC1

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Real Time Clock 16K (2Kx8) 70ns
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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