Philips Semiconductors Product specification
74F1244Octal buffer (3-State)
2
1989 Apr 04 853–0041 96221
FEATURES
• High impedance NPN base inputs for reduced loading
(20µA in High and Low states)
• Low power, light loading
• Functional pin-for-pin equivalent of 74F244
• 1/30th the bus loading of 74F244
• Provides ideal interface and increase fan-out of MOS
microprocessors
• Octal bus interface
• 3-State buffer outputs sink 64mA and source 15mA
DESCRIPTION
The 74F1244 is an octal buffer that is ideal for driving bus lines or
buffer memory address registers. The outputs are capable of sinking
64mA and sourcing up to 15mA, producing very good capacitive
drive characteristics. The device features two Output Enables, OE
a
and OE
b, each controlling four of the 3-State outputs.
The 74F1244 is pin and functionally compatible with the 74F244.
The lower power and light bus loading features make it an ideal part
to interface directly with MOS microprocessors.
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20
V
CC
OEa
Ia0
Yb0
Ia1
Yb1
Ia2
Yb2
Ia3
Yb3
GND
SF00227
OEb
Ya0
Ib0
Ya1
Ib1
Ya2
Ib2
Ya3
Ib3
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL SUPPLY
CURRENT (TOTAL)
74F1244 4.5ns 43mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V ±10%,
T
amb
= 0°C to +70°C
DRAWING
NUMBER
20-pin plastic DIP N74F1244N SOT146-1
20-pin plastic SOL N74F1244D SOT163-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS DESCRIPTION
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
Ian, Ibn Data inputs 1.0/0.033 20µA/20µA
OEa, OEb Output enable inputs (active Low) 1.0/0.033 20µA/20µA
Yan, Ybn Data outputs 750/106.7 15mA/64mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
LOGIC SYMBOL
OEa
1
SF00228
2 4 6 8 17 15 13 11
18 16 14 12 3 5 7 9
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3
V
CC
= Pin 20
GND = Pin 10
OEb19
IEC/IEEE SYMBOL
2
1
EN1
1
2
SF01366
19
4
6
8
17
15
13
11
EN2
9
7
5
3
12
14
16
18