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L9638D013TR
P1-P3
P4-P6
P7-P9
P10-P12
P13-P14
Obsolete Product(s) - Obsolete Product(s)
L9638
4/14
2.10
d
VLIN/dt
Slew rate falling ed
ge
From 90%
to 10% o
f V
LIN
-3
-2
-1
V/
µ
s
2.11
t
sym
Rising/
F
alli
ng edge
symme
try
t
sym
= t
slope_fall
- t
slope_r
ise
-5
-5
µ
s
2.12
t
trans_pd
Propag
ation de
lay of
transmitte
r
See F
ig.2
t
trans_pd
= max (
t
tra
ns_pdr
,
trans_pdf
)
4
µ
s
2.13
t
rec_pd
Propag
ation de
lay of
receiver
See F
ig.2
t
rec_pd
= max (
t
rec_pdr, trec_pdf
)
6
µ
s
2.14
t
rec_sym
Symmet
r
y of r
eceiv
er
propag
ation delay ris
ing
edge w.r
.t. falling edg
e
See F
ig.2
t
rec_sym
= (t
rec_pd
f -trec_pdr
)
-2
2
µ
s
2.15
t
trans_sym
Symme
tr
y of transm
itter
propag
ation delay ris
ing
edge w.r
.t. falling edg
e
See F
ig.2
t
trans_sym
= (t
trans_pdf -t
trans_pdr
)
-2
2
µ
s
2.16
t
LINgs
Bus wake-up glitch
suppre
ssion tim
e
See F
ig.3 V
LIN
= V
LINLow
40
100
µ
s
3
Transmission Input TxD
3.1
VT
xDLow
Input V
ol
tage dom
inant
state
1.5
V
3.2
VT
xDHigh
Input V
ol
tage rec
essive
state
3.5
V
3.3
RT
xD
TxD pu
ll up res
istor
5
10
25
K
Ω
4
Receive Output RxD
4.1
VR
xDLow
Outpu
t V
olt
age domin
ant
state
I
RxD
= 2mA
1.5
V
4.2
VR
xDHigh
Outpu
t V
olt
age reces
siv
e
state
I
RxD
≥
10
µ
A4
.
5
V
4.3
R
RxD
RxD pul
l up resi
stor
5
10
25
k
Ω
5
Inhibit Output INH
5.1
R
ON(INH)
Switch on
resistance
between Vs
and INH
I
INH
=-15m
A; Vs=13.
5V
20
40
Ω
5.2
I
ON(INH)
INH out
put curr
ent
Normal
or stand
-by mode
15
30
50
mA
5.3
R
OFF(INH)
Switch
off INH p
ull down
resistor
51
0
2
5
k
Ω
6
Wake Up Input WUP
6.1
V
WUPLow
Low le
vel input voltage
1.5
V
6.2
V
WUPHigh
High level input voltage
3.5
Vs+0.
3
V
Table 5.
Electrical C
haracteris
tics
(continu
ed)
(
V
S
= 6V to
26V; T
J
= -40 to
150 °C unl
ess otherwise
specif
ied)
Item
Symb
ol
Parameter
T
est C
ondition
Min.
T
yp.
Max.
U
nit
Obsolete Product(s) - Obsolete Product(s)
Obsolete Product(s) - Obsolete Product(s)
5/14
L9638
Note:
1.
Room temperat
ure evaluated - no 100% test
ed
6.3
t
WUPgs
Remote
wake-up delay time
T
ransition
ing on W
UP
40
1
00
µ
s
7
Enable Input EN
7.1
VEN
Low
Low le
vel input voltage
1.5
V
7.2
VEN
High
High level input voltage
3.5
V
7.3
R
EN
EN pul
l down resis
tor
5
10
25
K
Ω
7.4
tgts
Go to slee
p delay time
V
EN
= V
ENlow
40
100
µ
s
7.5
t
ENgs
EN wake-up g
litch
suppre
ssion tim
e
V
EN
= V
ENhi
gh
40
100
µ
s
8
AC Timing Parameters
8.1
D1
Duty Cy
cle 1
TH
Rec(max)
= 0.74
4 x V
SUP
;
TH
Dom(ma
x)
= 0.58
1 x V
SUP
;
Vsup = 7.
0 to 18V
; t
bit
= 50
µ
s;
D1 = t
Bus_rec(min)
/2 x t
Bit
(C
BUS
; R
BUS
) 1nF;
1k
Ω
/6.
8nF;
660
Ω
/10nF; 500
Ω
0.396
8.2
D2
Duty Cy
cle 2
TH
Rec(min)
= 0.284 x
V
SUP
;
TH
Dom(min)
= 0.422
x V
SUP
;
Vsup = 7.
6 to 18V
; t
bit
= 50
µ
s;
D2 = t
Bus_rec(min)
/2 x t
Bit
(C
BUS
; R
BUS
) 1nF;
1k
Ω
/6.
8nF;
660
Ω
/10nF; 500
Ω
0.581
8.3
D3
Duty Cy
cle 3
TH
Rec(max)
= 0.77
8 x V
SUP
;
TH
Dom(ma
x)
= 0.61
6 x V
SUP
;
Vsup = 7.
0 to 18V
; t
bit
= 96
µ
s;
D3 = t
Bus_rec(min)
/2 x t
Bit
(C
BUS
; R
BUS
) 1nF;
1k
Ω
/6.
8nF;
660
Ω
/10nF; 500
Ω
0.417
8.4
D4
Duty Cy
cle 4
TH
Rec(min)
= 0.251 x
V
SUP
;
TH
Dom(min)
= 0.389
x V
SUP
;
Vsup = 7.
6 to 18V
; t
bit
= 96
µ
s;
D4 = t
Bus_rec(min)
/2 x t
Bit
(C
BUS
; R
BUS
) 1nF;
1k
Ω
/6.
8nF;
660
Ω
/10nF; 500
Ω
0.591
9
Fault Conditions
9.1
I
LIN_NO_GND
LIN cur
rent w
ith GND
disconn
ected
GND = Vs = 12
V
0V< V
LIM
< 18V
(1)
-1
1
mA
9.2
I
LIN_NO_Vs
LIN cur
rent w
ith V
S
grounded
V = GND
, 0V < V
LIN
< 18V
(1)
100
µ
A
Table 5.
Electrical C
haracteris
tics
(continu
ed)
(
V
S
= 6V to
26V; T
J
= -40 to
150 °C unl
ess otherwise
specif
ied)
Item
Symb
ol
Parameter
T
est C
ondition
Min.
T
yp.
Max.
U
nit
Obsolete Product(s) - Obsolete Product(s)
Obsolete Product(s) - Obsolete Product(s)
L9638
6/14
3
TIMING DIAGRAM
Figure 3. Definition of Bus Timing Parameters
Obsolete Product(s) - Obsolete Product(s)
P1-P3
P4-P6
P7-P9
P10-P12
P13-P14
L9638D013TR
Mfr. #:
Buy L9638D013TR
Manufacturer:
STMicroelectronics
Description:
IC TXRX MONOLITHIC LIN-BUS 8SOIC
Lifecycle:
New from this manufacturer.
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