IRU1015
7
Rev. 1.3
08/20/02
www.irf.com
Layout Consideration
The output capacitors must be located as close to the
VOUT terminal of the device as possible. It is recom-
mended to use a section of a layer of the PC board as a
plane to connect the VOUT pin to the output capacitors to
prevent any high frequency oscillation that may result
from excessive trace inductance.
Figure 6 - Final schematic for the regulator design.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
Data and specifications subject to change without notice. 02/01
3.45V
R1
121
1%
R2
215
1%
5V
C2
1500uF
C1
1500uF
IRU1015
Adj
VOUT
VIN