10
LTC1279
APPLICATIONS INFORMATION
WUU
U
THD = 20log
V
2
2
+ V
3
2
+ V
4
2
... + V
N
2
V
1
where V
1
is the RMS amplitude of the fundamental fre-
quency and V
2
through V
N
are the amplitudes of the
second through Nth harmonics. THD versus input fre-
quency is shown in Figure 4. The LTC1279 has good
distortion performance up to the Nyquist frequency and
beyond.
Intermodulation Distortion
If the ADC input signal consists of more than one spectral
component, the ADC transfer function nonlinearity can
produce intermodulation distortion (IMD) in addition to
THD. IMD is the change in one sinusoidal input caused by
the presence of another sinusoidal input at a different
frequency.
If two pure sine waves of frequencies fa and fb are applied
to the ADC input, nonlinearities in the ADC transfer func-
tion can create distortion products at sum and difference
frequencies of mfa ± nfb, where m and n = 0, 1, 2, 3, etc.
For example, the 2nd order IMD terms include (fa + fb) and
(fa – fb) while the 3rd order IMD terms include (2fa + fb),
(2fa – fb), (fa + 2fb), and (fa – 2fb). If the two input sine
waves are equal in magnitude, the value (in decibels) of
the 2nd order IMD products can be expressed by the
following formula:
IMD (fa ± fb) = 20log
Amplitude at (fa ± fb)
Amplitude at fa
INPUT FREQUENCY (Hz)
10k
AMPLITUDE (dB BELOW THE FUNDAMENTAL)
0
10
20
30
40
50
60
70
80
–90
100
100k 1M
1279 G06
2M
THD
2ND HARMONIC
3RD HARMONIC
f
SAMPLE
= 600kHz
Figure 4. Distortion vs Input Frequency
Figure 5 shows the IMD performance at a 100kHz input.
Figure 5. Intermodulation Distortion Plot
Peak Harmonic or Spurious Noise
The peak harmonic or spurious noise is the largest spec-
tral component excluding the input signal and DC. This
value is expressed in decibels relative to the RMS value of
a full scale input signal.
Full Power and Full Linear Bandwidth
The full power bandwidth is that input frequency at which
the amplitude of the reconstructed fundamental is re-
duced by 3dB for a full scale input signal.
The full linear bandwidth is the input frequency at which
the S/(N + D) has dropped to 68dB (11 effective bits). The
LTC1279 has been designed to optimize input bandwidth,
allowing ADC to undersample input signals with frequen-
cies above the converter’s Nyquist Frequency. The noise
floor stays very low at high frequencies; S/(N + D) be-
comes dominated by distortion at frequencies far beyond
Nyquist.
Driving the Analog Input
The LTC1279’s analog input is easy to drive. It draws only
one small current spike while charging the sample-and-
hold capacitor at the end of conversion. During conversion
the analog input draws no current. The only requirement
is that the amplifier driving the analog input must settle
after the small current spike before the next conversion
starts. Any op amp that settles in 160ns to small current
transients will allow maximum speed operation. If slower
FREQUENCY (kHz)
0
AMPLITUDE (dB)
50
100 150 200
1279 G08
250 300
0
10
20
30
40
50
60
70
80
90
100
110
120
f
SAMPLE
= 600kHz
fa = 94.189kHz
fb = 97.705kHz
(fb – fa)
(2fa – fb)
(2fa)
(2fb)
(3fa)
(2fb – fa)
(fa) (fb)
(fa + fb)
(2fa + fb)
(fa + 2fb)
(3fb)
11
LTC1279
APPLICATIONS INFORMATION
WUU
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the internal reference so driving the reference is not
recommended, since the input span will exceed the supply
and codes will be lost at the full scale.) Figure 7 shows a
typical reference, the LT1019A-2.5 connected to the
LTC1279. This will provide an improved drift (equal to the
LT1019A-2.5’s maximum of 5ppm/°C) and a ±2.582V full
scale.
UNIPOLAR/BIPOLAR OPERATION AND ADJUSTMENT
Figure 8a shows the ideal input/output characteristics for
the LTC1279. The code transitions occur midway between
successive integer LSB values (i.e., 0.5LSB, 1.5LSB,
2.5LSB, ... FS – 1.5LSB). The output code is naturally
binary with 1LSB = FS/4096 = 5V/4096 = 1.22mV. Figure
8b shows the input/output transfer characteristics for the
bipolar mode in two’s complement format.
op amps are used, more settling time can be provided by
increasing the time between conversions. Suitable de-
vices capable of driving the ADC’s A
IN
input include the
LT
®
1360, LT1220, LT1223 and LT1224 op amps.
Internal Reference
The LTC1279 has an on-chip, temperature compensated,
curvature corrected, bandgap reference that is factory
trimmed to 2.42V. It is internally connected to the DAC and
is available at pin 2 to provide up to 800µA current to an
external load.
For minimum code transition noise, the reference output
should be decoupled with a capacitor to filter wideband
noise from the reference (10µF tantalum in parallel with a
0.1µF ceramic).
The V
REF
pin can be driven with a DAC or other means to
provide input span adjustment in bipolar mode. The V
REF
pin must be driven to at least 2.45V to prevent conflict with
the internal reference. The reference should be driven to
no more than 4.8V to keep the input span within the ±5V
supplies.
Figure 6 shows an LT1006 op amp driving the V
REF
pin. (In
the unipolar mode, the input span is already 0V to 5V with
Figure 8b. LTC1279 Bipolar Transfer Characteristics
Figure 7. Supplying a 2.5V Reference Voltage
to the LTC1279 with the LT1019A-2.5
Figure 8a. LTC1279 Unipolar Transfer Characteristics
V
REF(OUT)
2.45V
3
INPUT RANGE
±1.033 × V
REF(OUT)
+
LT1006
5V
–5V
LTC1279
A
IN
AGND
V
REF
10µF
1279 F06
Figure 6. Driving the V
REF
with the LT1006 Op Amp
3
INPUT RANGE
±2.58V
(= ±1.033 × V
REF
)
10µF
1279 F07
LT1019A-2.5
V
IN
GND
V
OUT
5V
5V
–5V
LTC1279
A
IN
AGND
V
REF
INPUT VOLTAGE (V)
0V
OUTPUT CODE
–1
LSB
1279 F08b
011...111
011...110
000...001
000...000
100...000
100...001
111...110
1
LSB
BIPOLAR
ZERO
111...111
FS/2 – 1LSBFS/2
FS = 5V
1LSB = FS/4096
INPUT VOLTAGE (V)
0V
OUTPUT CODE
FS – 1LSB
1279 F08a
111...111
111...110
111...101
111...100
000...000
000...001
000...010
000...011
1
LSB
UNIPOLAR
ZERO
1LSB =
FS
4096
5V
4096
=
12
LTC1279
U
S
A
O
PP
L
IC
AT
I
WU
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I FOR ATIO
Unipolar Offset and Full-Scale Error Adjustments
In applications where absolute accuracy is important,
offset and full-scale errors can be adjusted to zero. Offset
error must be adjusted before full-scale error. Figure 9a
shows the extra components required for full-scale error
adjustment. If both offset and full-scale adjustments are
needed, the circuit in Figure 9b can be used. For zero offset
error apply 0.61mV (i.e., 0.5LSB) at the input and adjust
the offset trim until the LTC1279 output code flickers
between 0000 0000 0000 and 0000 0000 0001. For zero
full-scale error apply an analog input of 4.99817V (i.e.,
FS – 1.5LSB or last code transition) at the input and adjust
R5 until the LTC1279 output code flickers between 1111
1111 1110 and 1111 1111 1111.
1279 F09a
R4
100
FULL-SCALE
ADJUST
R3
10k
R2
10k
R1
50
V1
+
A1
ADDITIONAL PINS OMITTED FOR CLARITY
±20LSB TRIM RANGE
LTC1279
A
IN
AGND
Figure 9a. Full-Scale Adjust Circuit
1279 F09b
R2
10k
R4
100k
R1
10k
10k
5V
R9
20
ANALOG
INPUT
0V TO 5V
R3
100k
5V
R8
10k
OFFSET
ADJUST
R6
400
R5
4.3k
FULL-SCALE
ADJUST
R7
100k
+
LTC1279
A
IN
Figure 9b. LTC1279 Unipolar Offset and Full-Scale Adjust Circuit
1279 F09c
R2
10k
R4
100k
R1
10k
ANALOG
INPUT
R3
100k
5V
R8
20k
OFFSET
ADJUST
R6
200
R5
4.3k
FULL-SCALE
ADJUST
R7
100k
+
–5V
LTC1279
A
IN
Figure 9c. LTC1279 Bipolar Offset and Full-Scale Adjust Circuit
Bipolar Offset and Full-Scale Error Adjustments
Bipolar offset and full-scale errors are adjusted in a similar
fashion to the unipolar case. Again, bipolar offset must be
adjusted before full-scale error. Bipolar offset error ad-
justment is achieved by trimming the offset of the op amp
driving the analog input of the LTC1279 while the input
voltage is 0.5LSB below ground. This is done by applying
an input voltage of –0.61mV (–0.5LSB) to the input in
Figure 9c and adjusting the R8 until the ADC output code
flickers between 0000 0000 0000 and 1111 1111 1111.
For full scale adjustment, an input voltage of 2.49817V
(FS – 1.5LSBs) is applied to the input and R5 is adjusted
until the output code flickers between 0111 1111 1110
and 0111 1111 1111.
BOARD LAYOUT AND BYPASSING
Wire wrap boards are not recommended for high resolu-
tion or high speed A/D converters. To obtain the best
performance from the LTC1279, a printed circuit board is
required. The printed circuit board’s layout should ensure
that digital and analog signal lines are separated as much
as possible. In particular, care should be taken not to run
any digital trace alongside an analog signal trace or
underneath the ADC. The analog input should be screened
by AGND.
High quality tantalum and ceramic bypass capacitors
should be used at the AV
DD
and V
REF
pins as shown in
Figure 10. For the bipolar mode, a 0.1µF ceramic provides

LTC1279ISW#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 12-B, 600ksps Smpl A/D Conv w/ SD
Lifecycle:
New from this manufacturer.
Delivery:
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