Feb21-07 SP7661 Evaluation Manual ©2007 Sipex Corporation
Page 7 of 11
Step by step design procedures:
Choose
fs/10fco =
60Khz600Khz/10fco ==
Calculate fp_LC, the double pole frequency of the filter
)CL(2
1
fp_LC
⋅
=
π
12kHz 11.99kHz
)80uF2.2uH2π
1
fp_LC ≈=
⋅⋅
=
Calculate fz_ESR , the ESR zero frequency
CoutCes
2π
1
fz_ESR
⋅⋅
=
kHz
µFmΩπ
ESRfz 663
)80()3(2
1
_ =
⋅⋅
=
Select R1 component value such that 10kΩ ≤ R1 ≤ 100kΩ
R1 = 10kΩ, 1%
Calculate R2 base on the desired V
OUT
1
8.
1
2
−
=
V
Vout
R
R
Ω≈Ω=
−
Ω
= 31603200
1
8.
3.3
10
2
V
V
K
R
Note: Loop Compensation component calculations discussed in this
section are further elaborated in the application note #ANP16, “Loop
Compensation of Voltage-Mode Buck Converters”.
These calculations shown here can be quickly iterated with the Type III
Loop Compensation Calculator on the web at:
www.sipex.com/files/Application-Notes/TypeIIICalculator.xls
