Ionization Smoke Detector
with Interconnect and Timer
A5367
6
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
To decrease sensitivity, a resistor can be connected between
SENSITIVITY SET and VSS, with the value:
R
SENSITIVITYSET
= 1.1E6 × K / (1 – K) ,
where
K = 1 / (V
DD
/ V
SENSITIVITYSET
– 1) .
Low Battery
The low battery condition threshold is set internally by a voltage
divider connected between VDD and VSS. The threshold can
be externally adjusted by connecting a resistor between the
LOW-V SET pin and either the VDD or VSS pins.
To increase the threshold, a resistor can be connected between
LOW-V SET and VSS. Given an initial threshold, V
(th)init
(nomi-
nally 7.5 V), and a target threshold, V
(th)set
, the resistor should
have the value:
R
LOWVSET
= 600E3 × K / (1 – 0.375 × K) ,
where
K = 1 / (V
(th)set
/ [0.727 × V
(th)init
] – 1) .
To decrease the threshold, a resistor can be connected between
LOW-V SET and VDD. Given an initial threshold, V
(th)init
(nomi-
nally 7.5 V), and a target threshold, V
(th)set
, the resistor should
have the value:
R
LOWVSET
= 960E3 × K / (0.6 – 1.6 × K) ,
where
K = V
(th)set
/ (0.727 × V
(th)init
) – 1 .
The battery voltage level is checked approximately every 40 sec-
onds during the (approximately) 10 mA, 10 ms LED pulse. If an
LED is not used, it should be replaced with an equivalent resistor
(typically 500 to 1000 Ω) such that the battery loading remains
about 10 mA.
Timer (Hush) Mode
An internal timer is provided that can be used in various configu-
rations to allow a period of reduced smoke detector sensitivity,
referred to as Timer (or Hush) mode.
In normal operation, when a high-to-low transition occurs at the
TIMER START pin, the internal timer is reset, Timer mode is
enabled, and the circuit resets to a no-alarm condition. During
Timer mode, which is active for approximately 10.25 minutes
(368 clock cycles), the TIMER OUT pin is pulled down to VSS
every time the A5367 makes a check for smoke. A resistor con-
nected between the TIMER OUT and the SENSITIVITY SET
pins will decrease the detector’s sensitivity to smoke during
this time, and allow the user to hush alarms caused by nuisance
smoke or steam (such as from cooking).
While the Timer mode is active, the LED flashes once every
(approximately) 10 seconds. If the level of smoke increases such
that the reduced-sensitivity level is reached, the A5367 will signal
an Alarm condition. If such an Alarm condition does occur, the
timer will still continue to completion of its cycle. If Timer mode
will not be used, the TIMER START pin can be tied to VSS or
left open.
I/O
A connection to the I/O pin allows multiple smoke detectors to
be interconnected. If any single unit detects smoke, its I/O pin is
driven high (after a nominal 3 s delay), and all connected units
will sound their associated horns. When the I/O pin is driven
high by another device, the oscillator immediately speeds up to
its 41.7 ms period. The remainder of the sped-up clock cycle,
and two additional consecutive clock cycles with I/O high are
required to cause an alarm. If the I/O pin falls below its threshold
at any time during those (approximately) 83.4 ms, an internal
latch is reset and there will not be an alarm. Thus, the I/O must
remain high for (approximately) 93.9 ms in order to cause an
alarm. This filtering provides significant immunity to I/O noise.
The LED is suppressed when an alarm is signaled from an inter-
connected unit, and any local alarm condition causes the I/O pin
to be ignored as an input. When in Timer mode, the device will
still signal an alarm if I/O is driven high externally. An inter-
nal NMOS device acts as a charge dump to aid in applications
involving a large (distributed) capacitance on the I/O pin, and is
activated at the end of a local or test alarm. This pin has an on-
chip pulldown device and must be left unconnected if not used.
Testing
On power-up, all internal counters are reset. Internal test cir-
cuitry allows low battery check by holding the FEEDBACK and
OSC CAP pins low during power-up, then reducing V
DD
and
monitoring the HORN1 pin. HORN1 will be driven high when
V
DD
falls below the low-battery threshold. All functional tests
can be accelerated by driving the OSC CAP pin with a 2 kHz
square wave. The 10 ms strobe period must be maintained for
proper operation of the comparator circuitry.
