CYIV-51001-2.0
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Cyclone IV Device Handbook,
Volume 1
March 2016
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1. Cyclone IV FPGA Device Family
Overview
Altera’s new Cyclone
®
IV FPGA device family extends the Cyclone FPGA series
leadership in providing the market’s lowest-cost, lowest-power FPGAs, now with a
transceiver variant. Cyclone IV devices are targeted to high-volume, cost-sensitive
applications, enabling system designers to meet increasing bandwidth requirements
while lowering costs.
Built on an optimized low-power process, the Cyclone IV device family offers the
following two variants:
Cyclone IV E—lowest power, high functionality with the lowest cost
Cyclone IV GX—lowest power and lowest cost FPGAs with 3.125 Gbps
transceivers
1 Cyclone IV E devices are offered in core voltage of 1.0 V and 1.2 V.
f For more information, refer to the Power Requirements for Cyclone IV Devices
chapter.
Providing power and cost savings without sacrificing performance, along with a
low-cost integrated transceiver option, Cyclone IV devices are ideal for low-cost,
small-form-factor applications in the wireless, wireline, broadcast, industrial,
consumer, and communications industries.
Cyclone IV Device Family Features
The Cyclone IV device family offers the following features:
Low-cost, low-power FPGA fabric:
6K to 150K logic elements
Up to 6.3 Mb of embedded memory
Up to 360 18 × 18 multipliers for DSP processing intensive applications
Protocol bridging applications for under 1.5 W total power
March 2016
CYIV-51001-2.0
1–2 Chapter 1: Cyclone IV FPGA Device Family Overview
Cyclone IV Device Family Features
Cyclone IV Device Handbook, March 2016 Altera Corporation
Volume 1
Cyclone IV GX devices offer up to eight high-speed transceivers that provide:
Data rates up to 3.125 Gbps
8B/10B encoder/decoder
8-bit or 10-bit physical media attachment (PMA) to physical coding sublayer
(PCS) interface
Byte serializer/deserializer (SERDES)
Word aligner
Rate matching FIFO
TX bit slipper for Common Public Radio Interface (CPRI)
Electrical idle
Dynamic channel reconfiguration allowing you to change data rates and
protocols on-the-fly
Static equalization and pre-emphasis for superior signal integrity
150 mW per channel power consumption
Flexible clocking structure to support multiple protocols in a single transceiver
block
Cyclone IV GX devices offer dedicated hard IP for PCI Express (PIPE) (PCIe)
Gen 1:
×1, ×2, and ×4 lane configurations
End-point and root-port configurations
Up to 256-byte payload
One virtual channel
2 KB retry buffer
4 KB receiver (Rx) buffer
Cyclone IV GX devices offer a wide range of protocol support:
PCIe (PIPE) Gen 1 ×1, ×2, and ×4 (2.5 Gbps)
Gigabit Ethernet (1.25 Gbps)
CPRI (up to 3.072 Gbps)
XAUI (3.125 Gbps)
Triple rate serial digital interface (SDI) (up to 2.97 Gbps)
Serial RapidIO (3.125 Gbps)
Basic mode (up to 3.125 Gbps)
V-by-One (up to 3.0 Gbps)
DisplayPort (2.7 Gbps)
Serial Advanced Technology Attachment (SATA) (up to 3.0 Gbps)
OBSAI (up to 3.072 Gbps)
Chapter 1: Cyclone IV FPGA Device Family Overview 1–3
Device Resources
March 2016 Altera Corporation Cyclone IV Device Handbook,
Volume 1
Up to 532 user I/Os
LVDS interfaces up to 840 Mbps transmitter (Tx), 875 Mbps Rx
Support for DDR2 SDRAM interfaces up to 200 MHz
Support for QDRII SRAM and DDR SDRAM up to 167 MHz
Up to eight phase-locked loops (PLLs) per device
Offered in commercial and industrial temperature grades
Device Resources
Table 11 lists Cyclone IV E device resources.
Table 1–1. Resources for the Cyclone IV E Device Family
Resources
EP4CE6
EP4CE10
EP4CE15
EP4CE22
EP4CE30
EP4CE40
EP4CE55
EP4CE75
EP4CE115
Logic elements (LEs) 6,272 10,320 15,408 22,320 28,848 39,600 55,856 75,408 114,480
Embedded memory
(Kbits)
270 414 504 594 594 1,134 2,340 2,745 3,888
Embedded 18 × 18
multipliers
15 23 56 66 66 116 154 200 266
General-purpose PLLs22444444 4
Global Clock Networks 10 10 20 20 20 20 20 20 20
User I/O Banks 88888888 8
Maximum user I/O
(1)
179 179 343 153 532 532 374 426 528
Note to Table 1–1:
(1) The user I/Os count from pin-out files includes all general purpose I/O, dedicated clock pins, and dual purpose configuration pins. Transceiver
pins and dedicated configuration pins are not included in the pin count.

EP4CE55F23A7N

Mfr. #:
Manufacturer:
Intel / Altera
Description:
FPGA - Field Programmable Gate Array
Lifecycle:
New from this manufacturer.
Delivery:
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