LTC2908
12
2908fd
APPLICATIONS INFORMATION
Therefore, the LTC2908 takes a different approach to solv-
ing this problem of supply noise causing spurious reset.
The fi rst line of defense against this spurious reset is a
fi rst order lowpass fi lter at the output of the comparators.
Therefore, each comparator output is integrated over time
before triggering the output logic. Therefore, any kind of
transient at the input of the comparator needs to be of
suffi cient magnitude and duration before it can trigger a
change in the output logic.
The second line of defense is the 200ms delay time t
RST
.
This delay eliminates the effect of any supply noise, whose
frequency is above 1/200ms = 5Hz, on the RST output.
When any one of the supply voltages drops below its
threshold, the RST pin asserts low. When the supply
recovers above its threshold, the reset-pulse-generator
timer starts counting.
If all the supplies remain above their corresponding thresh-
old when the timer fi nishes counting, the RS T pin weakly
pulls high. However, if any of the supplies falls below its
threshold any time during the period when the timer is still
counting, the timer resets and it starts fresh when all the
supplies rise above their corresponding threshold.
Note that this second line of defense is only effective
for a rising supply and does not affect the sensitivity of
the system to a falling supply. Therefore, the fi rst line of
defense that works for both cases of rising and falling is
necessary. These two approaches prevent spurious reset
caused by supply noise without sacrifi cing the threshold
accuracy.
Although all six comparators for the six inputs have built-
in glitch fi ltering, use bypass capacitors on the V1 and
V2 inputs because the greater of V1 or V2 supplies the
V
CC
for the part (a 0.1μF ceramic capacitor satisfi es most
applications). Apply fi lter capacitors on the V3, V4, V
ADJ1
,
V
ADJ2
, V
ADJ3
, V
ADJ4
and V
ADJ5
inputs in extremely noisy
situations.
With this variation of reset threshold in mind, the nominal
reset threshold of the supervisor resides below the
minimum supply voltage; just enough so that the reset
threshold band and the power supply tolerance bands
do not overlap. If the two bands overlap, the supervisor
could generate a false or nuisance reset when the power
supply remains within its specifi ed tolerance band (for
example at 4.8V).
Adding half of the reset threshold accuracy spread (1.5%)
to the ideal 5% thresholds puts the LTC2908 thresholds at
6.5% (typ) below the nominal input voltage. For example,
the 5V typical threshold is 4.675V, or 75mV below the
ideal threshold of 4.750V. The guaranteed threshold lies
in the band between 4.600V (8% below 5V) and 4.750V
(5% below 5V) overtemperature.
The powered system must work reliably down to the lowest
voltage in the threshold band or risk malfunction before
the reset line falls. In the 5V example, using the 1.5%
accurate supervisor, the system ICs must work down to
4.60V (8% below 5V). System ICs working with a ±2.5%
accurate supervisor must operate down to 4.50V (10%
below 5V), increasing the required system voltage margin
and the probability of system malfunction.
In any supervisory application, supply noise riding on
the monitored DC voltage can cause spurious resets,
particularly when the monitored voltage is near the reset
threshold. A less desirable but common solution to this
problem is to introduce hysteresis around the nominal
threshold. Notice however, this hysteresis introduces an
error term in the threshold accuracy. Therefore, a ±2.5%
accurate monitor with ±1% hysteresis is equivalent to a
±3.5% monitor with no hysteresis.
