© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 9
1 Publication Order Number:
MC14585B/D
MC14585B
4-Bit Magnitude Comparator
The MC14585B 4−Bit Magnitude Comparator is constructed with
complementary MOS (CMOS) enhancement mode devices. The circuit
has eight comparing inputs (A3, B3, A2, B2, A1, B1, A0, B0), three
cascading inputs (A < B, A = B, and A > B), and three outputs (A < B,
A = B, and A > B). This device compares two 4−bit words (A and B)
and determines whether they are “less than”, “equal to”, or “greater
than” by a high level on the appropriate output. For words greater than
4−bits, units can be cascaded by connecting outputs (A > B), (A < B),
and (A = B) to the corresponding inputs of the next significant
comparator. Inputs (A < B), (A = B), and (A > B) on the least significant
(first) comparator are connected to a low, a high, and a low, respectively.
Applications include logic in CPU’s, correction and/or detection of
instrumentation conditions, comparator in testers, converters, and
controls.
Features
• Diode Protection on All Inputs
• Expandable
• Applicable to Binary or 8421−BCD Code
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load over the Rated Temperature Range
• Can be Cascaded − See Figure 3
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable*
• This Device is Pb−Free and is RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to V
SS
)
Parameter Symbol Value Unit
DC Supply Voltage Range V
DD
−0.5 to +18.0 V
Input or Output Voltage Range
(DC or Transient)
V
in
, V
out
−0.5 to V
DD
+ 0.5
V
Input or Output Current (DC or Transient)
per Pin
I
in
, I
out
±10 mA
Power Dissipation per Package (Note 1) P
D
500 mW
Ambient Temperature Range T
A
−55 to +125 °C
Storage Temperature Range T
stg
−65 to +150 °C
Lead Temperature (8−Second Soldering) T
L
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Package: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
≤ (V
in
or V
out
) ≤ V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
Device Package Shipping
†
ORDERING INFORMATION
http://onsemi.com
MC14585BDR2G SOIC−16
(Pb−Free)
2500/Tape & Ree
MC14585BDG SOIC−16
(Pb−Free)
48 Units / Rail
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb−Free Package
MARKING DIAGRAM
SOIC−16
D SUFFIX
CASE 751B
1
16
14585BG
AWLYWW
1
NLV14585BDR2G* SOIC−16
(Pb−Free)
2500/Tape & Ree
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
(A t B)
out
(A u B)
out
B3
A3
V
DD
B1
A0
B0
(A u B)
in
(A = B)
out
A2
B2
V
SS
A1
(A = B)
in
(A t B)
in
