2
IR2104
(
S
) & (PbF)
www.irf.com
Symbol Definition Min. Max. Units
V
B
High side floating absolute voltage -0.3 625
V
S
High side floating supply offset voltage V
B
- 25 V
B
+ 0.3
V
HO
High side floating output voltage V
S
- 0.3 V
B
+ 0.3
V
CC
Low side and logic fixed supply voltage -0.3 25
V
LO
Low side output voltage -0.3 V
CC
+ 0.3
V
IN
Logic input voltage (IN & SD) -0.3 V
CC
+ 0.3
dV
s
/dt Allowable offset supply voltage transient — 50 V/ns
P
D
Package power dissipation @ T
A
≤ +25°C (8 lead PDIP) — 1.0
(8 lead SOIC) — 0.625
Rth
JA
Thermal resistance, junction to ambient (8 lead PDIP) — 125
(8 lead SOIC) — 200
T
J
Junction temperature — 150
T
S
Storage temperature -55 150
T
L
Lead temperature (soldering, 10 seconds) — 300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
B
High side floating supply absolute voltage V
S
+ 10 V
S
+ 20
V
S
High side floating supply offset voltage Note 1 600
V
HO
High side floating output voltage V
S
V
B
V
CC
Low side and logic fixed supply voltage 10 20
V
LO
Low side output voltage 0 V
CC
V
IN
Logic input voltage (IN &
SD
)0V
CC
T
A
Ambient temperature -40 125
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
°C
V
V
W
°C/W
°C
