ZSSC3136
© 2016 Integrated Device Technology, Inc.
2.5.2. Startup Phase
1
After power-on, the startup phase is processed, which includes
• Internal supply voltage settling including reset of the circuitry by the power-on reset block (POR).
Refer to the ZSSC313x Technical Note—High Voltage Protection for power-on/off thresholds.
Duration (beginning with V
VDDA
-V
VSSA
=0V): 500µs to 2ms; AOUT: high impedance.
• System start and configuration, EEPROM readout, and signature check.
Duration: ~200µs; AOUT: lower diagnostic range (LDR).
• ROM check, if CFGAPP:CHKROM=1.
Duration: ~10ms; AOUT: lower diagnostic range (LDR).
• Processing the measurement cycle start routine.
Duration: 5x A/D conversion time; AOUT behavior depends on configured one-wire communication mode
(refer to section 2.6):
OWIANA or OWIDIS AOUT: lower diagnostic range (LDR)
OWIWIN or OWIENA AOUT: tri-state
If an error is detected during the startup phase, the Diagnostic Mode (DM) is activated and the analog output at
the AOUT pin remains in the lower diagnostic range.
After the startup phase, the continuous running measurement and sensor signal conditioning cycle is started, and
analog or digital output of the conditioned sensor signal is activated. If the one-wire communication mode
OWIWIN is selected, the OWI startup window expires before analog output is available.
2.5.3. Conditioning Calculation
The digitalized value for the bridge signal is processed with a conditioning formula to remove offset and
temperature dependency and to compensate nonlinearity up to 3
rd
order. The result is a non-negative 15-bit value
for the measured bridge sensor signal in the range [0; 1). This value is available for readout via I²C or OWI
communication. For the analog output, the value is clipped to the programmed output limits.
Note: The extent of signal deviation that can be compensated by the conditioning calculation depends on the
specific sensor signal characteristics. For a rough estimation, assume the following: offset
compensation and gain correction are not limited. Notice that resolution of the digitally gained signal is
determined by the ADC resolution in respect to the dynamic input range used. The temperature
correction includes first and second order terms and should be adequate for all practically relevant
cases. The non-linearity correction of the sensor signal is possible for second-order up to about
30% FS regarding ideal fit and for third-order up to about 20% FS. Overall, the conditioning formula
applied is able to reduce the non-linearity of the sensor signal by a factor of 10.
1
All timing values are roughly estimated for an oscillator frequency f
OSC
=3MHz and are proportional to that frequency.
