74LVT162373DL,118

Philips Semiconductors Product specification
74LVT162373
3.3 V LVT 16-bit transparent D-type latch
with 30 termination resistors (3-State)
1999 Sep 23
6
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = –40°C to +85°C UNIT
MIN TYP
1
MAX
V
IK
Input clamp voltage V
CC
= 2.7V; I
IK
= –18mA –0.85 –1.2 V
V
OH
High-level output voltage V
CC
= 3.0V; I
OH
= –12mA 2.0
V
OL
Low–level output voltage V
CC
= 3.0V; I
OL
= 16mA 0.8 V
V
RST
Power-up output Low voltage
5
V
CC
= 3.6V; I
O
= 1mA; V
I
= GND or V
CC
0.1 0.55 V
V
CC
= 3.6V; V
I
= V
CC
or GND Control pins 0.1 ±1
I
p
V
CC
= 0 or 3.6V; V
I
= 5.5V 0.4 10
µA
I
I
u
u
V
CC
= 3.6V; V
I
= V
CC
Data
p
ins
4
0.1 1
µ
A
V
CC
= 3.6V; V
I
= 0
Data
pins
4
–0.4 –5
I
OFF
Output off current V
CC
= 0V; V
I
or V
O
= 0 to 4.5V 0.1 ±100 µA
V
CC
= 3V; V
I
= 0.8V 75 135
I
HOLD
Bus Hold current D inputs
V
CC
= 3V; V
I
= 2.0V –75 –135
µA
V
CC
= 0V to 3.6V; V
CC
= 3.6V ±500
I
EX
Current into an output in the
High state when V
O
> V
CC
V
O
= 5.5V; V
CC
= 3.0V 50 125 µA
I
PU/PD
Power up/down 3-State output
current
3
V
CC
1.2V; V
O
= 0.5V to V
CC
; V
I
= GND or V
CC
;
OE/OE = Don’t care
1 ±100 µA
I
OZH
3-State output High current V
CC
= 3.6V; V
O
= 3.0V; V
I
= V
IH
or V
IL
0.5 5
µA
I
OZL
3-State output Low current V
CC
= 3.6V; V
O
= 0.5V; V
I
= V
IH
or V
IL
0.5 –5
µ
A
I
CCH
V
CC
= 3.6V; Outputs High, V
I
= GND or V
CC,
I
O
=
0 0.07 0.12
I
CCL
Quiescent supply current V
CC
= 3.6V; Outputs Low, V
I
= GND or V
CC,
I
O
=
0 4.0 6 mA
I
CCZ
V
CC
= 3.6V; Outputs Disabled; V
I
= GND or V
CC,
I
O
=
0
6
0.07 0.12
I
CC
Additional supply current per
input pin
2
V
CC
= 3V to 3.6V; One input at V
CC
-0.6V,
Other inputs at V
CC
or GND
0.1 0.2 mA
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25°C.
2. This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND.
3. This parameter is valid for any V
CC
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
= 1.2V to V
CC
= 3.3V ± 0.3V a
transition time of 100µsec is permitted. This parameter is valid for T
amb
= 25°C only.
4. Unused pins at V
CC
or GND.
5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
6. I
CCZ
is measured with outputs pulled to V
CC
or GND.
7. This is the bus hold overdrive current required to force the input to the opposite logic state.
Philips Semiconductors Product specification
74LVT162373
3.3 V LVT 16-bit transparent D-type latch
with 30 termination resistors (3-State)
1999 Sep 23
7
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500; T
amb
= –40°C to +85°C.
LIMITS
SYMBOL PARAMETER WAVEFORM V
CC
= 3.3V ±0.3V V
CC
= 2.7V UNIT
MIN TYP
1
MAX MAX
t
PLH
t
PHL
Propagation delay
nDx to nQx
2
0.5
0.5
2.5
2.5
4.6
4.0
5.1
4.3
ns
t
PLH
t
PHL
Propagation delay
nLE to nQx
1
0.5
0.5
3.0
3.0
5.1
4.6
5.8
4.3
ns
t
PZH
t
PZL
Output enable time
to High and Low level
4
5
0.1
0.1
3.5
3.2
5.4
4.9
6.6
5.5
ns
t
PHZ
t
PLZ
Output disable time
from High and Low Level
4
5
0.1
0.1
3.5
3.2
5.4
5.1
5.7
5.0
ns
NOTE:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25°C.
AC SETUP REQUIREMENTS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500; T
amb
= –40°C to +85°C.
LIMITS
SYMBOL PARAMETER WAVEFORM
V
CC
= 3.3V ±0.3V V
CC
= 2.7V
UNIT
MIN TYP MIN
t
S
(H)
t
S
(L)
Setup time
nDx to nLE
3
1.5
2.0
0.1
0.2
1.0
2.0
ns
t
h
(H)
t
h
(L)
Hold time
nDx to nLE
3
1.0
1.5
0
0
1.0
2.0
ns
t
W
(H)
nLE pulse width
High
1 1.5 0.5 1.5 ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
V
M
V
M
V
M
V
M
V
M
t
w
(H)
t
PHL
t
PLH
nLE
nQx
SW00011
2.7V
0V
V
OH
V
OL
Waveform 1. Propagation Delay, Latch Enable to Output,
and Latch Enable Pulse Width
nDx
V
M
t
PLH
t
PHL
nQx
V
M
V
M
V
M
SW00012
2.7V
0V
V
OH
V
OL
Waveform 2. Propagation Delay for Data to Outputs
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
V
M
nDx
V
M
V
M
V
M
V
M
nLE
t
s
(H) t
h
(H) t
s
(L) t
h
(L)
SW00013
V
M
2.7V
0V
2.7V
0V
Waveform 3. Data Setup and Hold Times
nOE
V
M
t
PZH
t
PHZ
0V
nQx
V
M
V
M
SW00014
2.7V
0V
V
OH
-0.3V
V
OH
Waveform 4. 3-State Output Enable time to High Level
and Output Disable Time from High Level
Philips Semiconductors Product specification
74LVT162373
3.3 V LVT 16-bit transparent D-type latch
with 30 termination resistors (3-State)
1999 Sep 23
8
nOE
t
PZL
t
PLZ
0V
nQx
V
M
V
M
V
M
SW00015
2.7V
3V
V
OL
V
OL
+0.3V
Waveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORMS
PULSE
GENERATOR
R
T
V
IN
D.U.T.
V
OUT
C
L
R
L
V
CC
R
L
OPEN
V
M
V
M
t
W
AMP (V)
NEGATIVE
PULSE
10% 10%
90%
90%
0V
V
M
V
M
t
W
AMP (V)
POSITIVE
PULSE
90% 90%
10%
10%
0V
t
THL
(t
F
)
t
TLH
(t
R
)t
THL
(t
F
)
t
TLH
(t
R
)
V
M
= 1.5V
Input Pulse Definition
DEFINITIONS
R
L
= Load resistor; see AC CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
GND
6V
SW00003
Test Circuit for 3-State Outputs
TEST SWITCH
t
PHZ
/t
PZH
GND
t
PLZ
/t
PZL
6V
t
PLH
/t
PHL
open
SWITCH POSITION
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude Rep. Rate t
W
t
R
t
F
74LVT16
2.7V
10MHz 500ns 2.5ns 2.5ns

74LVT162373DL,118

Mfr. #:
Manufacturer:
Nexperia
Description:
Latches 16-BIT TRANS LATCH
Lifecycle:
New from this manufacturer.
Delivery:
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