13
PS8932C 07/31/08
PI3PCIE2612-B
High Bandwidth, 6-Differential Channel
1:2 DP/PCIe Gen2 Display Mux, BTX Pinout
PCIe Gen2 Output Characteristics
Symbol Parameter Min Nom Max Units Comments
Z
RX-DIFF-DC
DC Differential Input
Impedance
80 100 120
Ω
Rx DC Differential
Mode impedance.
Z
RX-DC
DC Input Impedance
40 50 60
Ω
Required IN_D+ as well
as IN_D- DC imped-
ance (50Ω +/- 20% tol-
erance). Includes mux
resistance.
V
RX-Bias
Rx input termination volt-
age
0 2.0 V Intended to limit pow-
er-up stress on PCIE
output buffers.
DDIL
Differential Insertion
Loss
-[0.6*(f)+0.5] dB up to 2.5
GHz (for example, -2 dB at
f = 2.5 GHz);
-[1.2*(f-2.5)+2] dB for 2.5
GHz < f 5 GHz (for exam-
ple, -5 dB at f = 5 GHz);
-[1.6*(f-5)+5] dB for 5
GHz < f 7.5 GHz (for
example, -9 dB at f = 7.5
GHz);
dB
DDRL
Differential Return Loss
-14 dB up to 2.8 GHz; -8
dB up to 5 GHz; -4 dB up
to 7.5 GHz.
dB
DDNEXT
Near End Crosstalk
-32 dB max up to 2.5 GHz;
-26 dB max up to 5.0 GHz;
-20 dB max up to 7.5 GHz;
dB
DDIL when
switch is off
Differential Insertion
Loss when switch is off
-20 dB up to 3 GHz; dB
08-0147
14
PS8932C 07/31/08
PI3PCIE2612-B
High Bandwidth, 6-Differential Channel
1:2 DP/PCIe Gen2 Display Mux, BTX Pinout
Display Port Output Characteristics
Symbol Parameter Min Nom Max Units Comments
Tbit Unit Interval 333 ps Normal Tbit at 2.7Gb/
s=370ps. 333ps=370ps-
10%
V
RX-Diffp-p
Differential Input Peak to
Peak Voltage
0.340 1.38 V VRX-DIFFp-p =
2*|VRX-D+ - VRX-D-
|. Applies to IN_D and
RX_IN signals.
T
JIT
Jitter added to high-speed
signals
7.4 ps Jitter budget for high-
speed signals as they
pass through the display
mux.
7.4ps = 0.02 Tbit at
2.7Gb/s
DDIL Differential Insertion
Loss
-[0.75*(f)+0.5] dB up to
1.35 GHz;
-[2.2*(f-1.35)+1.5] dB for
1.35 GHz < f 2.7 GHz
dB For example, -1.5 dB
at f = 1.35 GHz
For example, -4.5 dB
at f = 2.7 GHz
DDRL Differential Return Loss -14 dB up to 2.7 GHz dB
DDNEXT Near End Crosstalk -32 dB max up to 2.7 GHz dB
HPD Input Characteristics
Symbol Parameter Min Nom Max Units Comments
V
IH-HPD
Input high level 3.6 V Low-speed input chang-
es state on cable plug/
unplug.
V
IL-HPD
HPD Input Low Level 0 V
I
IN_HPD
HPD input leakage cur-
rent
|10| uA Measured with HPD
at VIH-HPD max and
VIL-HPD min
T
HPD
HPD_IN to HPD propa-
gation delay.
200
ns Time from HPD_IN
changing state to HPD
changing state. Includes
HPD rise/fall time.
T
RF-HPD
HPD rise/fall time.
120
ns Time required to transi-
tion from VOH-HPD to
VOL-HPD or from
VOL-HPD to VOH-
HPD.
Termination Resistors
Symbol Parameter Min Nom Max Units Comments
R
DDC
DDC Termination Resis-
tors
1.3K 1.5k 2.2k W
Applies to both 3.3V
and 5V pull up resistors.
08-0147
15
PS8932C 07/31/08
PI3PCIE2612-B
High Bandwidth, 6-Differential Channel
1:2 DP/PCIe Gen2 Display Mux, BTX Pinout
Signal Integrity Requirements and Test Procedures for 5.0 Gb/s
Parameter Procedure Requirements
Differential
Insertion Loss
(DDIL)
EIA 364-101
The EIA standard shall be used with the following considerations:
1. The measured differential S parameter shall be referenced to a
100 ohms differential impedance.
2. The test ¿ xture shall meet the test ¿ xture requirement de¿ ned in
Section 1.12.
3. The test ¿ xture effect shall be removed from the measured S
parameters. Refer to Note 1.
-[0.6*(f)+0.5] dB up to 2.5 GHz (for
example, -2 dB at f = 2.5 GHz);
-[1.2*(f-2.5)+2] dB for 2.5 GHz < f 5
GHz (for example, -5 dB at f = 5 GHz);
-[1.6*(f-5)+5] dB for 5 GHz < f 7.5
GHz (for example, -9 dB at f = 7.5
GHz);
Refer to Figure 1.
Differential
Return Loss
(DDRL)
EIA 364-108
The EIA standard shall be used with the following considerations:
1. The measured differential S parameter shall be referenced to a
100 ohms differential impedance.
2. The test ¿ xture shall meet the test ¿ xture requirement in Section
1.12.
3. The test ¿ xture effect shall be removed. Refer to Note 1.
-14 dB up to 2.8 GHz; -8 dB up to 5
GHz; -4 dB up to 7.5 GHz.
Refer to Figure 2.
Intra-pair Skew Intra-pair skew must be achieved by design; measurement not
required.
5 ps max
Differential Near
End Crosstalk
(DDNEXT)
EIA 364-90
The EIA standard must be used with the following considerations:
1. The crosstalk requirement is with respect to all the adjacent dif-
ferential pairs
-32 dB max up to 2.5 GHz;
-26 dB max up to 5.0 GHz;
-20 dB max up to 7.5 GHz;
See Figure 3.
Differential
Insertion Loss
(DDIL) when
switch is turned
off
EIA 364-101 -20 dB up to 3 GHz;
Notes:
1. The speci¿ ed S parameters requirements are for switch component only, not including the test ¿ xture effect. While the TRL calibration method is
recommended, other calibration methods are allowed.
Switch Signal Integrity Requirements and Test Procedures for 5.0 Gb/s
Signal integrity requirements for 5.0 Gb/s applications of the switch are speci¿ ed. Also included are the requirements of
the test ¿ xture for switch S-parameter measurements.
Signal Integrity Requirements
The procedures outlined in ANSI Electronics Industry Alliance (EIA) standards documents shall be followed:
• EIA 364-101 – Attenuation Test Procedure for Electrical Connectors, Sockets, Cable Assemblies or Interconnection
Systems
• EIA 364-90 – Crosstalk Ratio Test Procedure for Electrical Connectors, Sockets, Cable Assemblies or Interconnection
Systems
• EIA 364-108- Impedance, ReÀ ection Coef¿ cient, Return Loss, and VSWR Measured in the Time and Frequency Do-
main Test Procedure for Electrical Connectors, Sockets, Cable Assemblies or Interconnection Systems
08-0147

PI3PCIE2612-BZFEX

Mfr. #:
Manufacturer:
Diodes Incorporated
Description:
Video Switch ICs 6-differential channel switch
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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