NCV70501
http://onsemi.com
19
BITS DEFINITION
Symbol Bit position Reg Description
Par Bit 7 – ADDR_0x05 SR1 Parity bit for SR1.
SPI Bit 6 – ADDR_0x05 SR1 SPI error: no multiple of 16 rising clock edges between falling and rising edge of
CSB line.
SHORT Bit 5 – ADDR_0x05 SR1 An over current detected (common : reads if one of the SHORTij individual bits
are set)
OPEN Bit 4 – ADDR_0x05 SR1 Open Coil X or Y detected (common : reads if one of the two specific X / Y open
coil bits is set)
TSD Bit 3 – ADDR_0x05 SR1 Thermal shutdown flag. This situation should always be avoided in the final ap-
plication by proper thermal design.
TW Bit 2 – ADDR_0x05 SR1 Thermal warning flag. The controller unit should take action before the TSD is
reached (shutdown).
STALL Bit 1 – ADDR_0x05 SR1 Stall detected by the internal algorithm (BEMF < StThr). The feature can be dis-
abled (see prev. table)
HR Bit 0 – ADDR_0x05 SR1 Reset flag: “1” indicates that any reset has occurred (all registers content will go
to POR default).
Par Bit 7 – ADDR_0x06 SR2 Parity bit for SR2.
RHBpin Bit 6 – ADDR_0x06 SR2 Read out of RHB pin logic status.
MSP[5:0] Bits[5:0] – ADDR_0x06 SR2 Current translator micro-step position (see related table for details).
Par Bit 7 – ADDR_0x07 SR3 Parity bit for SR3.
DIRpin Bit 6 – ADDR_0x07 SR3 Read out of DIR pin logic status.
Bemfs Bit 5 – ADDR_0x07 SR3 Last BEMF measured voltage has expected polarity (Yes = 0, No = 1 means
opposite sign).
Bemf[4:0] Bits [4:0] – ADDR_0x07 SR3 BEMF measured value code. See formula in STALL DETECTION section for
details.
Par Bit 7 – ADDR_0x08 SR4 Parity bit for SR4.
T/BX Bit 6 – ADDR_0x08 SR4 PWM Regulation mode on X coil (regulation on Top = 1 or Bottom = 0)
SignX Bit 5 – ADDR_0x08 SR4 PWM sign for X coil regulation (“0” = positive, “1” = negative)
PWMX[4:0] Bits [4:0] – ADDR_0x08 SR4 PWM duty cycle value for coil X (proportional: 100% corresponds to 31dec)
Par Bit 7 – ADDR_0x09 SR5 Parity bit for SR5.
T/BY Bit 6 – ADDR_0x09 SR5 PWM Regulation mode on Y coil (regulation on Top = 1 or Bottom = 0)
SignY Bit 5 – ADDR_0x09 SR5 PWM sign for Y coil regulation (“0” = positive, “1” = negative)
PWMY[4:0] Bits [4:0] – ADDR_0x09 SR5 PWM duty cycle value related to coil Y (proportional: 100% corresponds to
31dec)
Par Bit 7 – ADDR_0x0A SR6 Parity bit for SR6.
OPENX Bit 6 – ADDR_0x0A SR6 Open Coil X detected.
Reserved Bits [5:4] – ADDR_0x0A SR6 Reserved, will be read as zeroes.
SHRTXPB Bit 3 – ADDR_0x0A SR6 Short circuit detected at XP pin towards ground (bottom).
SHRTXNB Bit 2 – ADDR_0x0A SR6 Short circuit detected at XN pin towards ground (bottom).
SHRTXPT Bit 1 – ADDR_0x0A SR6 Short circuit detected at XP pin towards supply (top).
SHRTXNT Bit 0 – ADDR_0x0A SR6 Short circuit detected at XN pin towards supply (top).
Par Bit 7 – ADDR_0x0B SR7 Parity bit for SR7.
OPENY Bit 6 – ADDR_0x0B SR7 Open Coil Y detected.
SHRTYPB Bit 3 – ADDR_0x0B SR7 Short circuit detected at YP pin towards ground (bottom).
SHRTYNB Bit 2 – ADDR_0x0B SR7 Short circuit detected at YN pin towards ground (bottom).
SHRTYPT Bit 1 – ADDR_0x0B SR7 Short circuit detected at YP pin towards supply (top).
SHRTYNT Bit 0 – ADDR_0x0B SR7 Short circuit detected at YN pin towards supply (top).
