ADA4862-3
Rev. A | Page 13 of 16
VIDEO LINE DRIVER
The ADA4862-3 was designed to excel in video driver
applications.
Figure 39 shows a typical schematic for a video
driver operating on a bipolar supplies.
75Ω
CABLE
75Ω
75Ω
V
OUT
–V
S
+V
S
IN
0.1μF
0.1μF
10μF
10μF
75Ω
CABLE
75Ω
05600-033
ADA4862-3
+
–
Figure 39. Video Driver Schematic
In applications that require two video loads be driven
simultaneously, the ADA4862-3 can deliver.
Figure 40 shows
the ADA4862-3 configured with dual video loads.
Figure 41
shows the dual video load performance.
75Ω
CABLE
75Ω
CABLE
75Ω
75Ω
75Ω
75Ω
V
OUT
2
V
OUT
1
–V
S
+V
S
IN
0.1μF
0.1μF
10μF
10μF
75Ω
CABLE
75Ω
05600-034
+
2
1
8
7
6
–
Figure 40. Video Driver Schematic for Two Video Loads
8
0
0.1
1000
FREQUENCY (MHz)
CLOSED-LOOP GAIN (dB)
1 10 100
7
6
5
4
3
2
1
G = +2
R
L
= 75Ω
C
L
= 4pF
V
OUT
= 2V p-p
V
S
= ±5V
V
S
= +5V
05600-008
Figure 41. Large Signal Frequency Response for Various Supplies, R
L
= 75 Ω
SINGLE-SUPPLY OPERATION
The ADA4862-3 can also operate in single-supply applications.
Figure 42 shows the schematic for a single 5 V supply video
driver. Resistors R2 and R4 establish the midsupply reference.
Capacitor C2 is the bypass capacitor for the midsupply
reference. Capacitor C1 is the input coupling capacitor, and C6
is the output coupling capacitor. Capacitor C5 prevents constant
current from being drawn through the internal gain set resistor.
Resistor R3 sets the circuits ac input impedance.
For more information on single-supply operation of op amps,
see
www.analog.com/library/analogDialogue/archives/35-
02/avoiding/
.
C2
1μF
R2
50kΩ
R4
50kΩ
R3
1kΩ
C1
22μF
R1
50Ω
C6
220μF
R5
75Ω
R6
75Ω
C5
22μF
ADA4862-3
+5V
05600-035
V
OUT
IN
–V
S
C3
2.2μF
C4
0.01μF
+5V
Figure 42. Single-Supply Video Driver Schematic
POWER DOWN
The ADA4862-3 is equipped with an independent Power Down
pin for each amplifier allowing the user to reduce the supply
current when an amplifier is inactive. The voltage applied to the
−V
S
pin is the logic reference, making single-supply applications
useful with conventional logic levels. In a typical 5 V single-
supply application, the −V
S
pin is connected to analog ground.
The amplifiers are powered down when applied logic levels are
greater than −V
S
+ 1 V. The amplifiers are enabled whenever the
disable pins are left either floating (disconnected) or the
applied logic levels are lower than 1 V above −V
S
.