®
AS7C3513B
3/24/04, v.1.2 Alliance Semiconductor P. 7 of 10
AC test conditions
Notes
1During V
CC
power-up, a pull-up resistor to V
CC
on CE is required to meet I
SB
specification.
2 This parameter is sampled, but not 100% tested.
3 For test conditions, see AC Test Conditions, Figures A and B.
4 These parameters are specified with C
L
= 5pF, as in Figure B. Transition is measured ±500mV from steady-state voltage.
5 This parameter is guaranteed, but not 100% tested.
6WE
is High for read cycle.
7CE
and OE are Low for read cycle.
8 Address valid prior to or coincident with CE
transition Low.
9 All read cycle timings are referenced from the last valid address to the first transitioning address.
10 Not applicable.
11 All write cycle timings are referenced from the last valid address to the first transitioning address.
12 Not applicable.
13 C=30pF, except on High Z and Low Z parameters, where C=5pF.
350Ω
C
13
320Ω
D
out
GND
+3.3V
Figure B: 3.3V Output load
- Output load: see Figure B.
- Input pulse level: GND to 3.0V. See Figure A.
- Input rise and fall times: 2 ns. See Figure A.
- Input and output timing reference levels: 1.5V.
168Ω
Thevenin equivalent:
D
out
+1.728V
10%
90%
10%
90%
GND
+3.0V
Figure A: Input pulse
2 ns
