ADIS16260/ADIS16265 Data Sheet
Rev. E | Page 4 of 20
Parameter Test Conditions/Comments Min Typ Max Unit
DAC OUTPUT 5 kΩ/100 pF to GND
Resolution 12 Bits
Relative Accuracy For Code 101 to Code 4095 4 LSB
Differential Nonlinearity 1 LSB
Offset Error
mV
Gain Error ±0.5 %
Output Range 0 2.5 V
Output Impedance 2
Output Settling Time 10 µs
LOGIC INPUTS Internal 3.3 V interface
Input High Voltage, V
INH
2.0 V
Input Low Voltage, V
INL
0.8 V
Logic 1 Input Current, I
INH
V
IH
= 3.3 V ±0.2 ±10 µA
Logic 0 Input Current, I
INL
V
IL
= 0 V
All Except RST
−40 −60 µA
RST The RST pin has an internal pull-up.
−1 mA
Input Capacitance, C
IN
10 pF
DIGITAL OUTPUTS Internal 3.3 V interface
Output High Voltage, V
OH
I
SOURCE
= 1.6 mA 2.4 V
Output Low Voltage, V
OL
I
SINK
= 1.6 mA 0.4 V
SLEEP TIMER
Timeout Period
3
0.5 128 sec
START-UP TIME
Initial Start-Up Time 165 ms
Sleep Mode Recovery 2.5 ms
Flash Update Time 50 ms
Flash Test Process Time Normal mode, SMPL_PRD[7:0] ≤ 0x07 18 ms
Low power mode, SMPL_PRD[7:0] ≥ 0x08
ms
FLASH MEMORY
Endurance
4
20,000 Cycles
Data Retention
5
T
J
= 55°C 10 Years
CONVERSION RATE
Minimum Conversion Time
SMPL_PRD[7:0] = 0x00
ms
Maximum Conversion Time SMPL_PRD[7:0] = 0xFF 7.75 sec
Maximum Throughput Rate SMPL_PRD[7:0] = 0x00 2048 SPS
Minimum Throughput Rate SMPL_PRD[7:0] = 0xFF 0.129 SPS
POWER SUPPLY
Operating Voltage Range, V
CC
4.75 5.0 5.25 V
Power Supply Current Low power mode, SMPL_PRD[7:0] ≥ 0x08 17 mA
Normal mode, SMPL_PRD[7:0] ≤ 0x07 41 mA
Sleep mode 350 µA
1
ADIS16260/ADIS16265 characterization data represents ±4σ to fall within the ±1% limit.
2
The maximum guaranteed measurement range is ±320°/sec. The sensor outputs will measure beyond this range, but performance is not assured.
3
Guaranteed by design.
4
Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C.
5
Retention lifetime equivalent at a junction temperature (T
J
) of 55°C, as per JEDEC Standard 22, Method A117. Retention lifetime decreases with junction temperature.
Data Sheet ADIS16260/ADIS16265
Rev. E | Page 5 of 20
TIMING SPECIFICATIONS
T
A
= −40°C to +85°C, V
CC
= 5.0 V, unless otherwise noted.
Table 2.
Normal Mode
(SMPL_PRD[7:0] ≤ 0x07, f
S
≥ 64 Hz)
Low Power Mode
(SMPL_PRD[7:0] ≥ 0x08, f
S
≤ 56.9 Hz)
Parameter Description Min
1
Typ Max
1
Min
1
Typ Max
1
Unit
f
SCLK
Serial clock 0.01 2.5 0.01 1.0 MHz
t
DATARATE
Data rate period 32 42 µs
t
STALL
Stall period between data 9 12 µs
t
CS
Chip select to clock edge 48.8 48.8 ns
t
DAV
Data output valid after SCLK falling
edge
2
100
100
ns
t
DSU
Data input setup time before SCLK
rising edge
24.4 24.4 ns
t
DHD
Data input hold time after SCLK
rising edge
48.8 48.8 ns
t
DF
Data output fall time 5 12.5 5 12.5 ns
t
DR
Data output rise time 5 12.5 5 12.5 ns
t
SFS
CS high after SCLK edge
3
5 5 ns
1
Guaranteed by design; not production tested.
2
The MSB presents an exception to this parameter. The MSB clocks out on the falling edge of
CS
. The rest of the DOUT bits are clocked after the falling edge of SCLK and
are governed by this specification.
3
This parameter may need to be expanded to allow for proper capture of the LSB. After
CS
goes high, the DOUT line goes into a high impedance state.
Timing Diagrams
CS
SCLK
t
DATARATE
t
STALL
08246-002
Figure 2. SPI Chip Select Timing
CS
SCLK
DOUT
DIN
1 2 3 4 5 6 15 16
R/W A5 A4 A3 A2
D2
MSB DB14
D1 LSB
DB13 DB12 DB10DB11 DB2 LSBDB1
t
CS
t
SFS
t
DAV
t
DHD
t
DSU
*
*NOT DEFINED
08246-003
Figure 3. SPI Timing (Using SPI Settings Typically Identified as CPOL = 1, CPHA = 1)
ADIS16260/ADIS16265 Data Sheet
Rev. E | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Acceleration
Any Axis, Unpowered, 0.5 ms
2000 g
Any Axis, Powered, 0.5 ms 2000 g
VCC to GND −0.3 V to +6.0 V
Digital Input/Output Voltage to GND −0.3 V to +5.3 V
Analog Inputs to GND −0.3 V to +3.5 V
Operating Temperature Range
1
−40°C to +125°C
Storage Temperature Range
1
−65°C to +150°C
1
Extended exposure to temperatures outside the temperature range of −40°C
to +85°C can adversely affect the accuracy of the factory calibration. For best
accuracy, store the part within the temperature range of −40°C to +85°C.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION

ADIS16265/PCBZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Position Sensor Development Tools ADIS16265 Eval Brd
Lifecycle:
New from this manufacturer.
Delivery:
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