TC682COA713 Datasheet TC682COA, TC682CPA, TC682EPA | P4-P6

TC682

DS21453D-page 4  2002-2012 Microchip Technology Inc.

3.0 DETAILED DESCRIPTION

FIGURE 3-1: TC682 Test Circuit

3.1 Phase 1

V

SS

charge storage – before this phase of the clock

cycle, capacitor C

1

is already charged to +5V. C

1

+

is

then switched to ground and the charge in C

1

–

is

transferred to C

2

–

. Since C

2

+

is at +5V, the voltage

potential across capacitor C

2

is now -10V.

FIGURE 3-2: Charge Pump – Phase 1

3.2 Phase 2

V

SS

transfer – phase two of the clock connects the neg-

ative terminal of C

2

to the negative side of reservoir

capacitor C

3

and the positive terminal of C

2

to ground,

transferring the generated -10V to C

3

. Simultaneously,

the positive side of capacitor C

1

is switched to +5V and

the negative side is connected to ground. C

2

is then

switched to V

CC

and GND and Phase 1 begins again.

FIGURE 3-3: Charge Pump – Phase 2

3.3 Maximum Operating Limits

The TC682 has on-chip Zener diodes that clamp V

IN

to approximately 5.8V, and V

OUT

to -11.6V. Never

exceed the maximum supply voltage or excessive

current will be shunted by these diodes, potentially

damaging the chip. The TC682 will operate over the

entire operating temperature range with an input

voltage of 2V to 5.5V.

3.4 Efficiency Considerations

Theoretically a charge pump voltage multiplier can

approach 100% efficiency under the following

conditions:

• The charge pump switches have virtually no offset

and are extremely low on resistance.

• Minimal power is consumed by the drive circuitry.

• The impedances of the reservoir and pump

capacitors are negligible.

For the TC682, efficiency is as shown below:

Voltage Efficiency = V

OUT

/ (-2V

IN

)

V

OUT

= -2V

IN

+ V

DROP

V

DROP

= (I

OUT

) (R

OUT

)

Power Loss = I

OUT

(V

DROP

)

There will be a substantial voltage difference between

V

OUT

and -2V

IN

if the impedances of the pump capaci-

tors C

1

and C

2

are high with respect to their respective

output loads.

Larger values of reservoir capacitor C

3

will reduce

output ripple. Larger values of both pump and reservoir

capacitors improve the efficiency. See Section 4.2

“Capacitor Selection” “Capacitor Selection”.

(+5V)

6

7

1

2

3

5

4

R

L

GND

+

–

+

–

+

GND

V

IN

All Caps = 3.3 μF

TC682

V

OUT

C

1

+

V

IN

C

2

+

C

1

–

C

2

–

C

OUT

V

–

OUT

C

1

C

2

–

V

IN

= +5V

V

OUT

-5V

SW4

SW1

SW2

SW3

C

2

C

3

C

1

+

–

+

–

+5V

V

OUT

-10V

SW4SW2

SW1 SW3

C

2

C

3

C

1

+

–

+

–

 2002-2012 Microchip Technology Inc. DS21453D-page 5

TC682

4.0 TYPICAL APPLICATIONS

4.1 Negative Doubling Converter

The most common application of the TC682 is as a

charge pump voltage converter which provides a

negative output of two times a positive input voltage

(Figure 4-1).

FIGURE 4-1: Inverting Voltage Doubler

4.2 Capacitor Selection

The output resistance of the TC682 is determined, in

part, by the ESR of the capacitors used. An expression

for R

OUT

is derived as shown below:

Assuming all switch resistances are approximately

equal:

R

OUT

is typically 140 at +25°C with V

IN

= +5V and 3.3

F low ESR capacitors. The fixed term (16R

SW

) is

about 80-90. It can be seen easily that increasing or

decreasing values of C1 and C2 will affect efficiency by

changing R

OUT

. However, be careful about ESR. This

term can quickly become dominant with large electro-

lytic capacitors. Table 4-1 shows R

OUT

for various

values of C1 and C2 (assume 0.5 ESR). C1 must be

rated at 6VDC or greater while C2 and C3 must be

rated at 12VDC or greater.

Output voltage ripple is affected by C3. Typically the

larger the value of C3 the less the ripple for a given load

current. The formula for

P-P

V

RIPPLE

is given below:

V

RIPPLE

= {1/[2(f

PUMP

x C3)] + 2(ESR

C3

)} (I

OUT

)

For a 10 F (0.5 ESR) capacitor for C3, f

PUMP

= 10

kHz and I

OUT

= 10 mA the peak-to-peak ripple voltage

at the output will be less then 60 mV. In most

applications (I

OUT

< = 10 mA) a 10-20 F capacitor and

1-5 F pump capacitors will suffice. Table 4-2 shows

V

RIPPLE

for different values of C3 (assume 1 ESR).

TABLE 4-1: OUTPUT RESISTANCE

VS. C1, C2

TABLE 4-2: V

RIPPLE

PEAK-TO-PEAK

VS. C3 (I

OUT

10mA)

GND

TC682

22 μF

7

6

54

3

2

1

+

V

IN

C

1

+

C

2

+

C

1

–

C

2

–

V

–

OUT

C

1

C

2

V

–

OUT

+

V

IN

C

3

R

OUT

=2(R

SW1

+R

SW2

+ESR

C1

+R

SW3

+R

SW4

+ESR

C2

)

+2(R

SW1

+R

SW2

+ESR

C1

+R

SW3

+R

SW4

+ESR

C2

)

+1/(f

PUMP

x C1) +1/(f

PUMP

x C2)

+ESR

C3

R

OUT

= 16R

SW

+ 4ESR

C1

+ 4ESR

C2

+ ESR

C3

+1/(f

PUMP

x C1) +1/(f

PUMP

x C2)

C1, C2 (F) R

OUT

()

0.05 4085

0.10 2084

0.47 510

1.00 285

3.30 145

5.00 125

10.00 105

22.00 94

100.00 87

C3 (F) V

RIPPLE

(mV)

0.50 1020

1.00 520

3.30 172

5.00 120

10.00 70

22.00 43

100.00 25

TC682

DS21453D-page 6  2002-2012 Microchip Technology Inc.

4.3 Paralleling Devices

Paralleling multiple TC682s reduces the output

resistance of the converter. The effective output

resistance is the output resistance of a single device

divided by the number of devices. As illustrated in

Figure , each requires separate pump capacitors C

1

and C

2

, but all can share a single reservoir capacitor.

4.4 -5V Regulated Supply From A

Single 3V Battery

Figure 4-3 shows a -5V power supply using one 3V

battery. The TC682 provides -6V at V

OUT

, which is

regulated to -5V by the negative LDO. The input to the

TC682 can vary from 3V to 5.5V without affecting

regulation appreciably. A TC54 device is connected to

the battery to detect undervoltage. This unit is set to

detect at 2.7V. With higher input voltage, more current

can be drawn from the outputs of the TC682. With 5V

at V

IN

, 10 mA can be drawn from the regulated output.

Assuming 150 source resistance for the converter,

with I

L

–

= 10 mA, the charge pump will droop 1.5V.

FIGURE 4-2: Paralleling TC682 for Lower Output Source Resistance

FIGURE 4-3: Negative Supply Derived from 3V Battery

10 μF

22 μF

V

IN

GND

Negative

Supply

TC682 TC682

GND

+

–

+

–

+

–

+

–

+

–

V

IN

C

1

+

C

2

+

C

1

–

C

2

–

V

–

OUT

V

IN

C

1

+

C

2

+

C

1

–

C

2

–

V

–

OUT

C

–

OUT

V

SS

V

SS

GND

TC682

3V

Ground

-5 Supply

LOW BATTERY

Negative LDO

Regulator

TC54VC2702Exx

1 μF

+

–

+

–

+

–

+

–

+

–

10

μ

F

22

μ

F

10

μ

F

V

IN

C

1

+

C

2

+

C

1

–

C

2

–

V

IN

V

IN

V

OUT

V

OUT

V

–

OUT

C

OUT

–

TC682COA713

TC682COA713

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