42004 Semtech Corp.
www.semtech.com
SC1175
POWER MANAGEMENT
Electrical Characteristics (Cont.)
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NOTES:
(1) Specification refers to application circuit.
(2) The soft start pin sources 25µA to an external capacitor. The converter operates in synchronous mode
above the soft start transition threshold and in asynchronous mode below it.
(3) Power good is an open collector pulled low when the output voltage is outside the ±10% window.
(4) This device is ESD sensitive. Use of standard ESD handling precautions is required.
(5) 200ns maximum at 70°.
Unless Specified: V
CC
= 4.75 to 5.25V, GND = PGND = 0V, FB = V
O
, 0mV < (CS(+) - CS(-)) < 60mV , T
J
= 25°C
5
2004 Semtech Corp.
www.semtech.com
SC1175
POWER MANAGEMENT
Expanded Pin DescriptionExpanded Pin Description
Expanded Pin DescriptionExpanded Pin Description
Expanded Pin Description
Pin 1:Pin 1:
Pin 1:Pin 1:
Pin 1: (VREF)
Internal 1.25V reference
Connected to the + input of the master channel error
amplifier.
Pin 2: Pin 2:
Pin 2: Pin 2:
Pin 2: (+IN)
+ Input of slave channel error amplifier.
Connected to 1.25V reference (Pin 1) for the two
independent channel configuration.
Pin 3, 18: Pin 3, 18:
Pin 3, 18: Pin 3, 18:
Pin 3, 18: (-IN2, -IN1)
- Inputs of close loop error amplifiers.
Works as a feedback inputs (For both modes).
Pin 4: Pin 4:
Pin 4: Pin 4:
Pin 4: (VCC)
VCC chip supply voltage.
15V maximum, 10mA typical.
Needs a 1µF ceramic multilayer decoupling capacitor
to GND (Pin 20).
Pin 5, 6,Pin 5, 6,
Pin 5, 6,Pin 5, 6,
Pin 5, 6,
11
11
1
5, 15, 1
5, 15, 1
5, 1
6: 6:
6: 6:
6: (CL2-, CL2+, CL1+, CL1-)
Pins (-) and (+) of the current limit amplifiers for both
channels.
Connected to output current sense resistors. Com-
pares that sense voltage to internal 75mV reference.
Needs RC filter for noise rejection.
Pin 7, 14: Pin 7, 14:
Pin 7, 14: Pin 7, 14:
Pin 7, 14: (BST2, BST1)
BST signal. Supply for high side driver.
Can be connected to a high enough voltage source.
Usually connected to bootstrap circuit.
Pin 8, 13:Pin 8, 13:
Pin 8, 13:Pin 8, 13:
Pin 8, 13: (DH2, DH1)
DH signal (Drive High).
Gate drive for top MOSFETs.
Requires a small series resistor.
Pin 9, 12:Pin 9, 12:
Pin 9, 12:Pin 9, 12:
Pin 9, 12: (DL2, DL1)
DL signal (Drive Low).
Gate drive for bottom MOSFETs.
Requires a small series resistor.
Pin 10:Pin 10:
Pin 10:Pin 10:
Pin 10: (PGND)
Power GND. Return of gate drive currents.
Pin 11:Pin 11:
Pin 11:Pin 11:
Pin 11: (BSTC)
Supply for bottom MOSFETs gate drive.
Pin 1Pin 1
Pin 1Pin 1
Pin 1
77
77
7
::
::
: (SS/ENA)
Soft start pin. Internal current source connected to
external capacitor.
Inhibits the chip if pulled down.
Pin 19:Pin 19:
Pin 19:Pin 19:
Pin 19: (PWRGD)
Power good signal.
Open collector signal .
Turns to 0 if output voltage is outside the power good
window.
Pin 20: Pin 20:
Pin 20: Pin 20:
Pin 20: (GND)
Analog GND.
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Notes:
(1) Only available in tape and reel packaging. A reel
contains 1000 (SOIC) and 2500 (TSSOP) devices.
(2) Lead free product. This product is fully WEEE and
RoHS compliant.
Pin Configuration Ordering Information
Pin Descriptions
Top View
(SOIC-20 and TSSOP-20 Pin)
62004 Semtech Corp.
www.semtech.com
SC1175
POWER MANAGEMENT
NOTES
(1) Block 1 (top) is the Master and Block 2 (bottom) is the Slave in current sharing configuration.
(2) For independant operation there is no Master or Slave.
Main Loop(s)
The SC1175 is a dual, voltage mode synchronous Buck
controller, the two separate channels are identical and
share only IC supply pins (Vcc and GND), output driver
ground (PGND) and pre-driver supply voltage (BSTC). They
also share a common oscillator generating a sawtooth
waveform for channel 1 and an inverted sawtooth for
channel 2. Each channel has its own current limit com-
parator. Channel 1 has the positive input of the error
amplifier internally connected to Vref. Channel 2 has
both inputs of the error amplifier uncommitted and avail-
able externally. This allows the SC1175 to operate in two
distinct modes.
a) Two independent channels with either common or
different input voltages and different output voltages.
The two channels each have their own voltage feed-
Block Diagram
Applications Information - Theory of Operation
back path from their own output. In this mode, the
positive input of error amplifier 2 is connected exter-
nally to Vref. If the application uses a common input
voltage, the sawtooth phase shift between the chan-
nels provides some measure of input ripple current
cancellation.
b) Two channels operating in current sharing mode
with common output voltage and either common in-
put voltage or different input voltages. In this mode,
channel 1 operates as a voltage mode Buck control-
ler, as before, but error amp 2 monitors and amplifies
the difference in voltage across the output current
sense resistors of channel 1 and channel 2 (Master
and Slave) and adjusts the Slave duty cycle to match
output currents. Because of finite gain and offsets in
the loop, the resistor ratio for perfect current match-
ing is not 1:1. The Master and Slave channels still have

SC1175CSWTRT

Mfr. #:
Manufacturer:
Semtech
Description:
Switching Controllers DUAL SYNCH D//DC CNTRL SHR CIR
Lifecycle:
New from this manufacturer.
Delivery:
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