PRODUCT SPECIFICATION ML4841
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Functional Description
The ML4841 consists of an average current controlled,
continuous boost Power Factor Corrector (PFC) front end
and a synchronized Pulse Width Modulator (PWM) back
end. The PWM section uses current mode control. The PWM
stage uses conventional trailing-edge duty cycle modulation,
while the PFC uses leading-edge modulation. This patented
leading/trailing edge modulation technique results in a
higher useable PFC error amplifier bandwidth, and can
significantly reduce the size of the PFC DC buss capacitor.
The synchronization of the PWM with the PFC simplifies the
PWM compensation due to the controlled ripple on the PFC
output capacitor (the PWM input capacitor). The PWM
section of the ML4841 runs at twice the frequency of the
PFC, which allows the use of smaller PWM output magnet-
ics and filter capacitors while holding down the losses in the
PFC stage power components.
In addition to power factor correction, a number of protec-
tion features have been built into the ML4841. These include
soft-start, PFC over-voltage protection, peak current limit-
ing, brown-out protection, duty cycle limit, and under-
voltage lockout.
Power Factor Correction
Power factor correction makes a non-linear load look like a
resistive load to the AC line. For a resistor, the current drawn
from the line is in phase with and proportional to the line
voltage, so the power factor is unity (one). A common class
of non-linear load is the input of a most power supplies,
which use a bridge rectifier and capacitive input filter fed
from the line. The peak-charging effect which occurs on the
input filter capacitor in such a supply causes brief high-
amplitude pulses of current to flow from the power line,
rather than a sinusoidal current in phase with the line volt-
age. Such a supply presents a power factor to the line of less
than one (another way to state this is that it causes significant
current harmonics to appear at its input). If the input current
drawn by such a supply (or any other non-linear load) can be
made to follow the input voltage in instantaneous amplitude,
it will appear resistive to the AC line and a unity power factor
will be achieved.
To hold the input current draw of a device drawing power
from the AC line in phase with and proportional to the input
voltage, a way must be found to prevent that device from
loading the line except in proportion to the instantaneous line
voltage. The PFC section of the ML4841 uses a boost-mode
DC-DC converter to accomplish this. The input to the
converter is the full wave rectified AC line voltage. No
filtering is applied following the bridge rectifier, so the input
voltage to the boost converter ranges, at twice line frequency,
from zero volts to the peak value of the AC input and back to
zero. By forcing the boost converter to meet two simulta-
neous conditions, it is possible to ensure that the current
which the converter draws from the power line agrees with
the instantaneous line voltage. One of these conditions is that
the output voltage of the boost converter must be set higher
than the peak value of the line voltage. A commonly used
value is 385VDC, to allow for a high line of 270VAC
.
The other condition is that the current which the converter is
allowed to draw from the line at any given instant must be
proportional to the line voltage. The first of these require-
ments is satisfied by establishing a suitable voltage control
loop for the converter, which in turn drives a current error
amplifier and switching output driver. The second require-
ment is met by using the rectified AC line voltage to modu-
late the output of the voltage control loop. Such modulation
causes the current error amplifier to command a power stage
current which varies directly with the input voltage. In order
to prevent ripple which will necessarily appear at the output
of the boost circuit (typically about 10VAC on a 385V DC
level) from introducing distortion back through the voltage
error amplifier, the bandwidth of the voltage loop is deliber-
ately kept low. A final refinement is to adjust the overall gain
of the PFC such to be proportional to 1/V
IN
2
, which linear-
izes the transfer function of the system as the AC input volt-
age varies.
Since the boost converter topology in the ML4841 PFC is of
the current-averaging type, no slope compensation is
required.
PFC Section
Gain Modulator
Figure 1 shows a block diagram of the PFC section of the
ML4841. The gain modulator is the heart of the PFC, as it is
this circuit block which controls the response of the current
loop to line voltage waveform and frequency, rms line volt-
age, and PFC output voltage. There are three inputs to the
gain modulator. These are:
1. A current representing the instantaneous input voltage
(amplitude and waveshape) to the PFC. The rectified
AC input sine wave is converted to a proportional
current via a resistor and is then fed into the gain
modulator at I
AC
. Sampling current in this way
minimizes ground noise, as is required in high power
switching power conversion environments. The gain
modulator responds linearly to this current.
2. A voltage proportional to the long-term rms AC line
voltage, derived from the rectified line voltage after
scaling and filtering. This signal is presented to the gain
modulator at V
RMS
. The gain modulator’s output is
inversely proportional to V
RMS
2
(except at unusually low
values of V
RMS
where special gain contouring takes over
to limit power dissipation of the circuit components
under heavy brownout conditions). The relationship
between V
RMS
and gain is designated as K, and is
illustrated in the Typical Performance Characteristics.
3. The output of the voltage error amplifier, VEAO. The
gain modulator responds linearly to variations in this
voltage.
