Characteristics T810H
4/10 Doc ID 15714 Rev 1
Figure 3. On-state rms current versus
ambient temperature (free air
convection, full cycle)
Figure 4. Relative variation of thermal
impedance, versus pulse duration
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0 25 50 75 100 125 150
I
T(RMS)
A
T
a
(°C)
1.E-03
1.E-02
1.E-01
1.E+00
1.E-03 1.E-02 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03
K=[Zth/Rth]
Zth(j-a)
Zth(j-c)
tp(s)
Figure 5. Relative variation of gate trigger
current and voltage versus junction
temperature (typical values)
Figure 6. Relative variation of holding and
latching current versus junction
temperature (typical values)
I
GT
,V
GT
[T
j
]/I
GT
,V
GT
[T
j
=25 °C]
0.0
0.5
1.0
1.5
2.0
2.5
-50 -25 0 25 50 75 100 125 150
I
GT
Q1-Q2
V
GT
Q1- Q2 - Q3
I
GT
Q3
T
j
(°C)
I
H
,I
L
[T
j
]/I
H
,I
L
[T
j
=25 °C]
0.0
0.5
1.0
1.5
2.0
-50 -25 0 25 50 75 100 125 150
I
H
I
L
T
j
(°C)
Figure 7. Surge peak on-state current
versus number of cycles
Figure 8. Non-repetitive surge peak on-state
current and corresponding value
of I
2
t
0
10
20
30
40
50
60
70
80
1 10 100 1000
I
TSM
(A)
Non repetitive
T
j
initial=25 °C
One cycle
t=20ms
Repetitive
T
C
=135 °C
Number of cycles
I
TSM
(A), I²t (A²s)
1
10
100
1000
0.01 0.10 1.00 10.00
T
j
initial=25 °C
dI/dt limitation: 50 A/µs
I
TSM
I²t
t
P
(ms)
Sinusoidal pulse width t
p
< 10 ms