10
LTC1484
SWITCHI G TI E WAVEFOR S
UWW
Figure 6. Driver Propagation Delays
Figure 9. Receiver Enable and Shutdown Timing
Figure 8. Receiver Propagation Delays
1.5V
2.3V
2.3V
t
ZH(SHDN)
,
t
ZH
NOTE: A, B ARE THREE-STATED WHEN DE = 0, 1k PULL-UP OR 1k PULL-DOWN
t
ZL(SHDN)
,
t
ZL
1.5V
0.5V
0.5V
t
HZ
t
LZ
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
3V
0V
DE
5V
V
OL
V
OH
0V
A, B
A, B
1484 F07
f = 1MHz, t
r
10ns, t
f
10ns
Figure 7. Driver Enable and Disable Timing
1.5V
1.5V
1.5V
t
ZH(SHDN),
t
ZH
NOTE: DE = 0, RO IS THREE-STATED IN SHUTDOWN, 1k PULL-UP FOR NORMALLY LOW OUTPUT,
1k PULL-DOWN FOR NORMALLY HIGH OUTPUT
t
ZL(SHDN),
t
ZL
1.5V
0.5V
0.5V
t
HZ
t
LZ
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
RE
5V
0V
5V
0V
RO
RO
1484 F09
f = 1MHz, t
r
10ns, t
f
10ns
0V
t
PHL
A – B
V
OL
RO
1.5V
NOTE: t
SKD
= |t
PHL
– t
PLH
|, RE = 0
1.5V
0V
t
PLH
INPUT
OUTPUT
5V
–V
OD2
V
OD2
1484 F08
f = 1MHz, t
r
10ns, t
f
10ns
DI
3V
1.5V
t
PLH
t
r
t
SKEW
NOTE: DE = 1
1/2 V
O
V
O
f = 1MHz, t
r
10ns, t
f
10ns
90%
50%
50%
10%
0V
B
A
V
O
–V
O
90%
1.5V
t
PHL
t
SKEW
10%
t
f
V
O
= V(A) – V(B)
1484 F06
11
LTC1484
APPLICATIONS INFORMATION
WUU
U
SWITCHI G TI E WAVEFOR S
UWW
1.5V
1.5V
NOTE: DI = 0, RE = 0, A AND B ARE THREE-STATED WHEN DE = 0
t
DZR
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
3V
0V
DE
V(A) – V(B)
RO
1484 F10
f = 1MHz, t
r
10ns, t
f
10ns
Figure 10. Driver Enable to Receiver Valid Timing
Low Power Operation
The LTC1484 has a quiescent current of 900µA max when
the driver is enabled. With the driver in three-state, the
supply current drops to 700µA max. The difference in
these supply currents is due to the additional current
drawn by the internal 22k receiver input resistors when the
driver is enabled. Under normal operating conditions, the
additional current is overshadowed by the 50mA current
drawn by the external termination resistor.
Receiver Open-Circuit Fail-Safe
Some encoding schemes require that the output of the
receiver maintain a known state (usually a logic 1) when
data transmission ends and all drivers on the line are
forced into three-state. Earlier RS485 receivers with a
weak pull-up at the A input will give a high output only
when the inputs are floated. When terminated or shorted
together, the weak pull-up is easily defeated causing the
receiver output to go low. External components are needed
if a high receiver output is mandatory. The receiver of the
LTC1484 has a fail-safe feature which guarantees the
output to be in a logic 1 when the receiver inputs are left
open or shorted together, regardless of whether the termi-
nation resistor is present or not.
In encoding schemes where the required known state is a
low, external components are needed for the LTC1484 and
other RS485 parts.
Fail-safe is achieved by making the receiver trip points fall
within the V
TH(MIN)
to V
TH(MAX)
range. When any of the
listed receiver input conditions exist, the receiver inputs
are effectively at 0V and the receiver output goes high.
The receiver fail-safe mechanism is designed to reject fast
common mode steps (–7V to 12V in 10ns) switching at
100kHz typ. This is achieved through an internal carrier
detect circuit similar to the LTC1482. This circuit has built-
in delays to prevent glitches while the input swings be-
tween ±V
TH(MAX)
levels. When all the drivers connected to
the receiver inputs are three-stated, the internal carrier
detect signal goes low to indicate that no differential signal
is present. When any driver is taken out of three-state, the
carrier detect signal takes 1.6µs typ (see t
DZR
) to detect the
enabled driver. During this interval, the transceiver output
(RO) is forced to the fail-safe high state. After 1.6µs, the
receiver will respond normally to changes in driver output.
If the part is taken out of shutdown mode with the receiver
inputs floating, the receiver output takes about 10µs to
leave three-state (see t
ZL(SHDN)
). If the receiver inputs are
actively driven to a high state, the outputs go high after
about 5.5µs.
12
LTC1484
APPLICATIONS INFORMATION
WUU
U
Shutdown Mode
The receiver output (RO) and the driver outputs (A, B) can
be three-stated by taking the RE and DE pins high and low
respectively. Taking RE high and DE low at the same time
puts the LTC1484 into shutdown mode and I
CC
drops to
20µA max.
In some applications (see CDMA), the A and B lines are
pulled to V
CC
or GND through external resistors to force
the line to a high or low state when all connected drivers
are disabled. In shutdown, the supply current will be
higher than 20µA due to the additional current drawn
through the external pull-up and the 22k input resistance
of the LTC1484.
ESD Protection
The ESD performance of the LTC1484 A and B pins is
characterized to meet ±15kV using the Human Body
Model (100pF, 1.5k), IEC-1000-4-2 level (±8kV) contact
mode and IEC-1000-4-2 level 3 (±8kV) air discharge
mode.
This means that external voltage suppressors are not
required in many applications when compared with parts
that are only protected to ±2kV. Pins other than the A and
B pins are protected to ±4.5kV typical per the Human Body
Model.
When powered up, the LTC1484 does not latch up or
sustain damage when the A and B pins are tested using any
of the three conditions listed. The data during the ESD
event may be corrupted, but after the event the LTC1484
continues to operate normally. The additional ESD protec-
tion at the A and B pins is important in applications where
these pins are exposed to the external world via connec-
tions to sockets.
Fault Protection
When shorted to –7V or 10V at room temperature, the
short-circuit current in the driver pins is limited by
internal resistance or protection circuitry to 250mA. Over
the industrial temperature range, the absolute maximum
positive voltage at any driver pin should be limited to 10V
to avoid damage to the driver pins. At higher ambient
temperatures, the rise in die temperature due to the
short-circuit current may trip the thermal shutdown
circuit.
When the driver is disabled, the receiver inputs can
withstand the entire –7V to 12V RS485 common mode
range without damage.
The LTC1484 includes a thermal shutdown circuit which
protects the part against prolonged shorts at the driver
outputs. If a driver output is shorted to another output or
to V
CC
, the current will be limited to 250mA. If the die
temperature rises above 150°C, the thermal shutdown
circuit three-states the driver outputs to open the current
path. When the die cools down to about 130°C, the driver
outputs are taken out of three-state. If the short persists,
the part will heat again and the cycle will repeat. This
thermal oscillation occurs at about 10Hz and protects the
part from excessive power dissipation. The average fault
current drops as the driver cycles between active and
three-state. When the short is removed, the part will return
to normal operation.
Carrier Detect Multiple Access (CDMA) Application
In normal half-duplex RS485 systems, only one node can
transmit at a time. If an idle node suddenly needs to gain
access to the twisted pair while other communications are
in progress, it must wait its turn. This delay is unaccept-
able in safety-related applications. A scheme known as
Carrier Detect Multiple Access (CDMA) solves this prob-
lem by allowing any node to interrupt on-going communi-
cations.
Figure 11 shows four nodes in a typical CDMA communi-
cations system. In the absence of any active drivers, bias
resistors (1.2k) force a “1” across the twisted pair. All
drivers in the system are connected so that when enabled,
they transmit a “0”. This is accomplished by tying DI low
and using DE as the driver data input. A “1” is transmitted
by disabling the driver’s “0” output and allowing the bias
resistors to reestablish a “1” on the twisted pair.
Control over communications is achieved by asserting a
“0” during the time an active transmitter is sending a “1”.
Any node that is transmitting data watches its own

LTC1484IS8#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
RS-485 Interface IC L Pwr RS485 Tran w/ Rcv Fail-Safe
Lifecycle:
New from this manufacturer.
Delivery:
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