IDT
™
/ ICS
™
LVDS PCI EXPRESS™ CLOCK SYNTHESIZER 6 ICS844204BK-245 REV. A JULY 9, 2007
ICS844204-245
CRYSTAL-TO-LVDS PCI EXPRESS™ CLOCK SYNTHESIZER W/SPREAD SPECTRUM PRELIMINARY
CRYSTAL INPUT INTERFACE
The ICS844204-245 has been characterized with 18pF parallel
resonant crystals. The capacitor values shown in Figure 2 below
FIGURE 2. CRYSTAL INPUt INTERFACE
were determined using a 25MHz, 18pF parallel resonant crystal
and were chosen to minimize the ppm error.
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS844204-245 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
DD,
V
DDA
and
V
DDO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance, power
supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10µF and a .01μF bypass
capacitor should be connected to each V
DDA
.
POWER SUPPLY FILTERING T ECHNIQUES
FIGURE 1. POWER SUPPLY FILTERING
10Ω
V
DDA
10μF
.01μF
3.3V
.01μF
V
DD
INPUTS:
CRYSTAL INPUTS
For applications not requiring the use of the crystal oscillator input,
both XTAL_IN and XTAL_OUT can be left floating. Though not
required, but for additional protection, a 1kΩ resistor can be tied
from XTAL_IN to ground.
LVCMOS CONTROL PINS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVDS OUTPUTS
All unused LVDS output pairs can be either left floating or
terminated with 100Ω across. If they are left floating, there should
be no trace attached.
C1
27p
X1
18pF Parallel Crystal
C2
27p
XTAL_OUT
XTAL_IN
