MP8040DN-LF-Z

MP8040 – HIGH CURRENT POWER HALF BRIGDE
MP8040 Rev. 1.61 www.MonolithicPower.com 4
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© 2011 MPS. All Rights Reserved.
TM
PIN FUNCTIONS
Pin # Name Description
1 PWM
Driver Logic Input. Drive PWM with the signal that controls the MP8040 output. Drive PWM
high to turn on the high-side switch; drive PWM low to turn on the low-side switch.
2 SP
Power Supply Input. Connect SP to the positive side of the input power supply. Bypass SP
to GND as close to the IC as possible.
3 SW
Switched Output. SW is the power output of the MP8040. Connect the output LC filter to
SW. SW is valid approximately 100µs after SP goes high.
4 GND Ground. (Note: Connect the exposed pad on the bottom side to Pin 4).
5 BS
Bootstrap Supply. BS powers the high-side gate of the MP8040. Connect a 0.1µF or
greater capacitor between BS and SW.
6 SHDN
Shutdown Input. SHDN enables/disables the MP8040. Drive SHDN low to turn on the
MP8040, drive it high to turn it off. If not used, connect SHDN to GND.
7 DRV
Gate Drive Supply Bypass. The voltage at DRV is supplied from an internal regulator from
SP. DRV powers the internal circuitry and internal MOSFET gate drives. Bypass DRV to
GND with a 0.1µF to 10µF capacitor.
8 FLT
Fault Output. Active-low, open drain.
A
low output at FLT indicates that the MP8040 has
detected a fault and has shutdown. Connect FLT to DRV through a 100k resistor.
OPERATION
The MP8040 is a general purpose, power
driver. It takes a logic input and drives a half
bridge comprised of 0.1 high-side and
low-side N-Channel MOSFET switches.
It operates at frequencies up to 1.2MHz, can
accept a DC supply voltage as high as 25V,
and produce peak output current as high as 9A.
HI DRIVE
LO DRIVE
CURRENT
LIMIT &
FEEDBACK
BS
UVLO
THERMAL
SHUTDOWN
UVLO
INTERNAL
5V REG.
LOGIC
D
BS
8
6
1
7
5
2
3
4
DRV
PWM
FLT
SHDN
BS
SP
SW
GND
MP8040_F02
Figure 1—Function Block Diagram
MP8040 – HIGH CURRENT POWER HALF BRIGDE
MP8040 Rev. 1.61 www.MonolithicPower.com 5
2/10/2011 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
TM
SW Output
The SW output drives the load. It is controlled
by the logic input signal at PWM. When the
signal at PWM is high (above 2V), the high-side
switch is turned on. When the signal at PWM is
low (less than 0.4V), the low-side switch is
turned on.
The MP8040 uses internal N-Channel
MOSFETs for both the high-side and low-side
switches. The high-side MOSFET gate drive is
powered from the voltage between SW and BS,
allowing BS to rise above the SP input voltage
to power the high-side MOSFET. To do this a
bootstrap capacitor is connected between SW
and BS. When the low-side switch is on, the
capacitor is internally charged from the voltage
at DRV, which is also internally generated.
There is a dead time region (typically 40ns)
where both the upper and lower switches are
off (see Figure 2).
Both the high-side and low-side switches have
internal current limits to prevent failure due to
excessive load current. Once the current limit is
reached, both output switches are turned off
and the fault output is asserted (driven low).
Shutdown
The MP8040 includes a 2.5µA shutdown mode.
When SHDN is high, both output switches are
turned off and the input current drops to 2.5µA.
When the MP8040 is shutdown, the internally
generated voltage at DRV drops to 0V, and the
fault output (FLT) is asserted (driven low). If the
shutdown mode is not used, connect SHDN
directly to GND.
Fault Output
The MP8040 includes a fault indicator output
(FLT). This is an active-low open drain output.
The MP8040 detects faults due to over-current
(>9A), over-temperature (>160°C), under-
voltage at SP (<6.5V), or if the part is disabled.
Connect FLT to DRV or to an external voltage
up to 6V through a 27k or greater resistor.
When any of the 3 fault conditions are detected,
both output switches are turned off and the SW
output is high-impedance.
Thermal Shutdown
The MP8040 includes a thermal overload
protection circuit. If the die temperature rises
above 160°C, the output switches are turned off
and the fault output is asserted. Once the
thermal overload circuit is tripped, the die
temperature must drop below 140°C before
automatically restarting.
V
SP
3/4 V
SP
1/2 V
SP
1/4 V
SP
TIME
SW
DT (RISE) DT (FALL)
DEAD TIME RISING = 20ns
DEAD TIME FALLING = 40ns
MP8040_F01
MP8040
SP
GND
2
4
3
SW
V
SP
Figure 2—Dead Time
MP8040 – HIGH CURRENT POWER HALF BRIGDE
MP8040 Rev. 1.61 www.MonolithicPower.com 6
2/10/2011 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
TM
TYPICAL APPLICATION CIRCUITS
MP8040
SP
DRV
FLT
BS
SW
SHDN
PWM
GND
+
V
SP
FAULT
+
ENABLE
PWM
SIGNAL
MP8040_F03
2
4
7
8
6
1
3
5
MP8040
SP
DRV
FLT
BS
SW
SHDN
PWM
GND
V
SP
FAULT
+
ENABLE
PWM
SIGNAL
MP8040_F04
PWM
CONTROLLER
V
OUT
2
4
7
8
6
1
3
5
Figure 3—Single Ended Audio Amplifier
Figure 4—General Purpose DC to DC
Converter
MP8040
SP
DRV
FLT
BS
SW
SHDN
PWM
GND
V
SP
FAULT
+
ENABLE
MP8040_F05
MP8040
SP
DRV
FLT
BS
SW
SHDN
PWM
GND
V
SP
+
FAULT
ENABLE
DIGITAL
AUDIO
SIGNAL
2
4
7
8
6
1
3
5
2
4
7
8
6
1
3
5
MP8040
SP
DRV
FLT
BS
SW
SHDN
PWM
GND
V
SP
FAULT
+
ENABLE
MP8040_F06
MP8040
SP
DRV
FLT
BS
SW
SHDN
PWM
GND
V
SP
+
FAULT
ENABLE
PWM
SIGNAL
M
2
4
7
8
6
1
3
5
2
4
7
8
6
1
3
5
Figure 5—80W Full Bridge Audio Amplifier Figure 6—Full Bridge Motor Driver

MP8040DN-LF-Z

Mfr. #:
Manufacturer:
Monolithic Power Systems (MPS)
Description:
Gate Drivers High Current Intgrtd Half Bridge Driver
Lifecycle:
New from this manufacturer.
Delivery:
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