LTM4622
19
Rev F
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APPLICATIONS INFORMATION
Table7. Output Voltage Response for Each Regulator Channel vs Component Matrix (Refer to Figure24)
1.25A Load Step Typical Measured Values
C
IN
(CERAMIC) PART NUMBER VALUE
C
OUT1
(CERAMIC)
PART NUMBER VALUE
C
OUT2
(BULK) PART NUMBER VALUE
Murata GRM188R61E475KE11# 4.7µF, 25V,
0603, X5R
Murata GRM21R60J476ME15# 47µF, 6.3V,
0805, X5R
Panasonic 6TPC150M 150µF, 6.3V 3.5
× 2.8 × 1.4mm
Murata
GRM188R61E106MA73#
10µF, 25V,
0603, X5R
Murata
GRM188R60J226MEA0#
22µF, 6.3V,
0603, X5R
Sanyo
Taiyo Yuden TMK212BJ475KG-T 4.7µF, 25V,
0805, X5R
Taiyo
Yuden
JMK212BJ476MG-T 47µF, 6.3V,
0805, X5R
V
OUT
(V)
C
IN
(CERAMIC)
(μF)
C
IN
(BULK)
C
OUT1
(CERAMIC)
(μF)
C
OUT2
(BULK)
(μF)
C
FF
(pF) V
IN
(V)
DROOP
(mV)
P-P
DERIVATION
(mV)
RECOVERY
TIME (μS)
LOAD
STEP (A)
LOAD STEP
SLEW RATE
(A/μS)
R
FB
(kΩ)
1 10 0 1 x 47 0 0 5, 12 0 103 4 1.25 10 90.9
1 10 0 1 x 10 150 0 5, 12 0 52 10 1.25 10 90.9
1.2 10 0 1 x 47 0 0 5, 12 0 113 4 1.25 10 60.4
1.2 10 0 1 x 10 150 0 5, 12 0 56 10 1.25 10 60.4
1.5 10 0 1 x 47 0 0 5, 12 0 131 8 1.25 10 40.2
1.5 10 0 1 x 10 150 0 5, 12 0 61 14 1.25 10 40.2
1.8 10 0 1 x 47 0 0 5, 12 0 150 8 1.25 10 30.1
1.8 10 0 1 x 10 150 0 5, 12 0 67 16 1.25 10 30.1
2.5 10 0 1 x 47 0 0 5, 12 0 184 8 1.25 10 19.1
2.5 10 0 1 x 10 150 0 5, 12 0 78 20 1.25 10 19.1
3.3 10 0 1 x 47 0 0 5, 12 0 200 12 1.25 10 13.3
3.3 10 0 1 x 10 150 0 5, 12 0 78 35 1.25 10 13.3
5 10 0 1 x 47 0 0 5, 12 0 309 12 1.25 10 8.25
5 10 0 1 x 10 150 0 5, 12 0 114 60 1.25 10 8.25
LTM4622
20
Rev F
For more information www.analog.com
APPLICATIONS INFORMATION
flows from the junction through the board into ambient
with no airflow or top mounted heat sink.
The 1V, 1.5V, 2.5V, 3.3V and 5V power loss curves in
Figures 8 to 12 can be used in coordination with the
load current derating curves in Figures 13 to 21 for cal-
culating an approximate θ
JA
thermal resistance for the
LTM4622 (in two-phase single output operation) with
no heat sinking and various airflow conditions. The
power loss curves are taken at room temperature, and
are increased with multiplicative factors of 1.35 assum-
ing junction temperature at 120°C. The derating curves
are plotted with the output current starting at
5A and the
ambient temperature at 40°C. These output voltages are
chosen to include the lower and higher output voltage
ranges for correlating the thermal resistance. Thermal
models are derived from several temperature measure-
ments in a controlled temperature chamber along with
thermal modeling analysis. The junction temperatures
are monitored while ambient temperature is increased
with and without airflow. The power loss increase with
ambient temperature change is factored into the derating
curves. The junctions are maintained at 120°C maximum
while lowering output current or power with increasing
ambient temperature. The decreased output current will
decrease the internal module loss as ambient tempera
-
ture is increased. The monitored junction temperature of
120°C minus the ambient operating temperature specifies
how much module temperature rise can be allowed. As an
example in Figure15 the load current is derated to ~3A
at ~102°C with no air or heat sink and the power loss for
the 5V to 1.5V at 3A output is about 0.95W. The 0.95W
loss is calculated with the ~0.7W room temperature loss
from the 5V to 1.5V power loss curve at 3A, and the 1.35
multiplying factor. If the 102°C ambient temperature is
subtracted from the 120°C junction temperature, then the
difference of 18°C divided by 0.95W equals a 19°C/W θ
JA
thermal resistance. Table3 specifies a 19 20°C/W value
which is very close. Table2 to 6 provide equivalent ther-
mal resistances for 1V, 1.5V
, 2.5V, 3.3V and 5V outputs
with and without airflow. The derived thermal resistances
in Table2 to 6 for the various conditions can be multiplied
by the calculated power loss as a function of ambient
temperature to derive temperature rise above ambient,
thus maximum junction temperature. Room temperature
power loss can be derived from the efficiency curves
in the Typical Performance Characteristics section and
adjusted with the above ambient temperature multiplica-
tive factors. The printed circuit board is a 1.6mm thick
four layer board with two ounce copper for the two outer
layers and one ounce copper for the two inner layers. The
PCB dimensions are 95mm × 76mm.
Figure22 shows a measured temperature picture of the
LTM4622 with no heatsink and no airflow, from 12V input
down to 3.3V and 5V output with 2.5A DC current on each.
Figure22. Thermal Picture, 12V Input, 3.3V and 5V Output, 2.5A DC Each Output with No Air Flow and No Heat Sink
4622 F22
LTM4622
21
Rev F
For more information www.analog.com
SAFETY CONSIDERATIONS
The LTM4622 modules do not provide galvanic isolation
from V
IN
to V
OUT
. There is no internal fuse. If required,
a slow blow fuse with a rating twice the maximum input
current needs to be provided to protect each unit from
catastrophic failure. The device does support thermal
shutdown and over current protection.
LAYOUT CHECKLIST/EXAMPLE
The high integration of LTM4622 makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout consid-
erations are still necessary.
n
Use large PCB copper areas for high current paths,
including V
IN
, GND, V
OUT1
and V
OUT2
. It helps to
minimize the PCB conduction loss and thermal stress.
n
Place high frequency ceramic input and output
capacitors next to the V
IN
, PGND and V
OUT
pins to
minimize high frequency noise.
APPLICATIONS INFORMATION
n
Place a dedicated power ground layer underneath
the unit.
n
To minimize the via conduction loss and reduce
module thermal stress, use multiple vias for
interconnection between top layer and other
power layers.
n
Do not put via directly on the pad, unless they are
capped or plated over.
n
Use a separated SGND ground copper area for
components connected to signal pins. Connect the
SGND to GND underneath the unit.
n
For parallel modules, tie the V
OUT
, V
FB
, and COMP
pins together. Use an internal layer to closely con-
nect these pins together. The TRACK pin can be
tied a common capacitor for regulator soft-start.
n
Bring out test points on the signal pins for
monitoring.
Figure23 gives a good example of the recommended
layout.
Figure23. Recommended PCB Layout
4622 F23

LTM4622IV#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Ultrathin Dual 20VIN, 3A Step-Down Module Regulator
Lifecycle:
New from this manufacturer.
Delivery:
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