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AD7392AR

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
AD7392/AD7393
Rev. C | Page 7 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
01121-006
AD7392
TOP VIEW
(Not to Scale)
V
DD
1
V
REF
20
SHDN
2
V
OUT
19
CS
3
AGND
18
RS
4
DGND
17
D0
5
D11
16
D1
6
D10
15
D2
7
D9
14
D3
8
D8
13
D4
9
D7
12
D5
10
D6
11
01121-007
AD7393
TOP VIEW
(Not to Scale)
NC = NO CONNECT
V
DD
1
V
REF
20
SHDN
2
V
OUT
19
CS
3
AGND
18
RS 4 DGND17
NC 5 D916
NC 6 D815
D0 7 D714
D1 8 D613
D2 9 D512
D3
10
D4
11
Figure 3. AD7392 Pin Configuration Figure 4. AD7393 Pin Configuration
Table 4. AD7392 Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD
Positive Power Supply Input. The specified range of operation is 2.7 V to 5.5 V.
2
SHDN Power Shutdown Active Low Input. DAC register contents are saved as long as power stays on the V
DD
pin. When
SHDN = 0, CS strobes write new data into the DAC register.
3
CS
Chip Select Latch Enable, Active Low.
4
RS
Asynchronous Active Low Input. Resets the DAC register to 0.
5 to 16 D0 to D11 Parallel Input Data Bits. D11 is the MSB; D0 is the LSB.
17 DGND Digital Ground.
18 AGND Analog Ground.
19 V
OUT
DAC Voltage Output.
20 V
REF
DAC Reference Input. Establishes the DAC full-scale voltage.
Table 5. AD7393 Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD
Positive Power Supply Input. The specified range of operation is 2.7 V to 5.5 V.
2
SHDN Power Shutdown Active Low Input. DAC register contents are saved as long as power stays on the V
DD
pin.
When
SHDN = 0, CS strobes write new data into the DAC register.
3
CS
Chip Select Latch Enable, Active Low.
4
RS
Asynchronous Active Low Input. Resets the DAC register to 0.
5, 6 NC No Connect.
7 to 16 D0 to D9 Parallel Input Data Bits. D9 is the MSB; D0 is the LSB.
17 DGND Digital Ground.
18 AGND Analog Ground.
19 V
OUT
DAC Voltage Output.
20 V
REF
DAC Reference Input. Establishes the DAC full-scale voltage.
AD7392/AD7393
Rev. C | Page 8 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
1.0
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
0 512 1024 1536 2048 2560 3072 3584 4096
AD7392
01121-008
CODE (Decimal)
INL (LSB)
V
DD
= 2.7V
V
REF
= 2.5V
T
A
= 25°C
Figure 5. AD7392 Integral Nonlinearity Error vs. Code
1.0
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
AD7393
01121-009
CODE (Decimal)
INL (LSB)
V
DD
= 2.7V
V
REF
= 2.5V
T
A
= 25°C
0 128 256 384 512 640 768 896 1024
Figure 6. AD7393 Integral Nonlinearity Error vs. Code
25
0
5
10
15
20
5.0 5.8 6.6 7.3 8.1 8.9 9.7 10.5 11.2 12.0
01121-010
TOTAL UNADJUSTED ERROR (LSB)
FREQUENCY
AD7392
SS = 100 UNITS
V
DD
= 2.7V
V
REF
= 2.5V
T
A
= 25°C
Figure 7. AD7392 Total Unadjusted Error Histogram
100
90
80
70
60
50
40
30
20
10
0
–10 –3.3 3.3 10 16 23 30 36 43 50
01121-011
TOTAL UNADJUSTED ERROR (LSB)
FREQUENCY
AD7393
SS = 300 UNITS
V
DD
= 2.7V
V
REF
= 2.5V
T
A
= 25°C
Figure 8. AD7393 Total Unadjusted Error Histogram
30
24
18
12
6
0
–66 0–6–12–20–26–32–40–46–52–60
01121-012
FULL-SCALE TEMPERATURE COEFFICIENT (ppm/°C)
FREQUENCY
AD7393
SS = 100 UNITS
V
DD
= 2.7V
V
REF
= 2.5V
T
A
= –40°C TO +85°C
Figure 9. AD7393 Full-Scale Output Temperature Coefficient Histogram
16
14
12
10
8
6
4
2
0
1 10 100 1k 10k 100k
01121-013
FREQUENCY (Hz)
OUTPUT VOLTAGE NOISE (µV/ Hz)
AD7392
V
DD
= 5V
V
REF
= 2.5V
T
A
= 25°C
Figure 10. Voltage Noise Density vs. Frequency
AD7392/AD7393
Rev. C | Page 9 of 20
100
95
90
85
80
75
70
65
60
55
50
0
V
LOGIC
FROM
0V TO 3V
V
LOGIC
FROM
3V TO 0V
3.02.52.01.51.00.5
01121-014
V
IN
(V)
SUPPLY CURRENT (µA)
AD7392
V
DD
= 3V
T
A
= 25°C
Figure 11. Supply Current vs. Logic Input Voltage
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1765432
01121-015
SUPPLY VOLTAGE (V)
THRESHOLD VOLTAGE (V)
AD7392
CODE = 0xFFF
V
REF
= 2V
RS LOGIC VOLTAGE
VARIED
V
LOGIC
FROM
LOW TO HIGH
V
LOGIC
FROM
HIGH TO LOW
Figure 12. Logic Threshold vs. Supply Voltage
100
30
40
50
60
70
80
90
20
–55 –35 –15 5 25 45 65 85 105 125
01121-016
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
V
DD
= 5V, V
LOGIC
= 0V
V
DD
= 3.6V, V
LOGIC
= 2.4V
V
DD
= 3V, V
LOGIC
= 0V
AD7392
SAMPLE SIZE = 300 UNITS
Figure 13. Supply Current vs. Temperature
1000
800
600
400
200
0
1k 10k 100k 1M 10M
01121-017
CLOCK FREQUENCY (Hz)
SUPPLY CURRENT (µA)
a
b
c
d
a. V
DD
= 5.5V, CODE = 0x155
b. V
DD
= 5.5V, CODE = 0x3FF
c. V
DD
= 2.7V, CODE = 0x155
d. V
DD
= 2.7V, CODE = 0x355
AD7392
V
LOGIC
= 0V TO V
DD
TO 0V
V
REF
= 2.5V
T
A
= 25°C
Figure 14. Supply Current vs. Clock Frequency
60
50
40
30
20
10
0
10 100 1k 10k
01121-018
FREQUENCY (Hz)
PSRR (dB)
T
A
= 25°C
V
DD
= 5V ± 5%
V
DD
= 3V ± 5%
Figure 15. Power Supply Rejection Ratio vs. Frequency
40
30
20
10
0
054321
01121-019
V
OUT
(V)
I
OUT
(mA)
V
DD
= 5V
V
REF
= 3V
CODE = 0x000
Figure 16. I
OUT
at Zero Scale vs. V
OUT
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

AD7392AR

Mfr. #:
Buy AD7392AR
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 12B 3-5V uPOWER PARALLEL
Lifecycle:
New from this manufacturer.
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