LTC6409
16
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applicaTions inForMaTion
between the R
L
4 = 200Ω differential resistance seen at
location B and the 200Ω formed by the two 100Ω match-
ing resistors at the LTC6409 output. Thus, the differential
power at location B is 10 – 6 = 4dBm. Since the transformer
ratio is 4:1 and it has an insertion loss of about 1dB, the
power at location C (across R
L
) is calculated to be 4 – 6
– 1 = –3dBm. This means that IMD3 should be measured
while the power at the output of the demo board is –3dBm
which is equivalent to having 2V
P-P
differential peak (or
10dBm) at the output of the LTC6409.
GBW vs f
–3dB
Gain-bandwidth product (GBW) and –3dB frequency (f
–3dB
)
have been both specified in the Electrical Characteristics
table as two different metrics for the speed of the LTC6409.
GBW is obtained by measuring the gain of the amplifier
at a specific frequency (f
TEST
) and calculate gain • f
TEST
.
To measure gain, the feedback factor (i.e. b = R
I
/(R
I
+
R
F
)) is chosen sufficiently small so that the feedback loop
does not limit the available gain of the LTC6409 at f
TEST
,
ensuring that the measured gain is the open loop gain of
the amplifier. As long as this condition is met, GBW is a
parameter that depends only on the internal design and
compensation of the amplifier and is a suitable metric to
specify the inherent speed capability of the amplifier.
f
–3dB
, on the other hand, is a parameter of more practi-
cal interest in different applications and is by definition
the frequency at which the gain is 3dB lower than its low
frequency value. The value of f
–3dB
depends on the speed
of the amplifier as well as the feedback factor. Since the
LTC6409 is designed to be stable in a differential signal
gain of 1 (where R
I
= R
F
or b = 1/2), the maximum f
–3dB
is obtained and measured in this gain setting, as reported
in the Electrical Characteristics table.
In most amplifiers, the open loop gain response exhibits a
conventional single-pole roll-off for most of the frequen-
cies before crossover frequency and the GBW and f
–3dB
numbers are close to each other. However, the LTC6409 is
intentionally compensated in such a way that its GBW is
significantly larger than its f
–3dB
. This means that at lower
frequencies (where the input signal frequencies typically lie,
e.g. 100MHz) the amplifiers gain and the thus the feedback
loop gain is larger. This has the important advantage of
further linearizing the amplifier and improving distortion
at those frequencies.
Looking at the Frequency Response vs Closed Loop Gain
graph in the Typical Performance Characteristics section
of this data sheet, one sees that for a closed loop gain
(A
V
) of 1 (where R
I
= R
F
= 150Ω), f
–3dB
is about 2GHz.
However, for A
V
= 400 (where R
I
= 25Ω and R
F
= 10kΩ),
the gain at 100MHz is close to 40dB = 100V/V, implying
a GBW value of 10GHz.
Feedback Capacitors
When the LTC6409 is configured in low differential gains,
it is often advantageous to utilize a feedback capacitor (C
F
)
in parallel with each feedback resistor (R
F
). The use of C
F
implements a pole-zero pair (in which the zero frequency
is usually smaller than the pole frequency) and adds posi-
tive phase to the feedback loop gain around the amplifier.
Therefore, if properly chosen, the addition of C
F
boosts
the phase margin and improves the stability response of
the feedback loop. For example, with R
I
= R
F
= 150Ω, it is
recommended for most general applications to use C
F
=
1.3pF across each R
F
. This value has been selected to
maximize f
–3dB
for the LTC6409 while keeping the peaking
of the closed loop gain versus frequency response under
a reasonable level (<1dB). It also results in the highest
frequency for 0.1dB gain flatness (f
0.1dB
).
However, other values of C
F
can also be utilized and tailored
to other specific applications. In general, a larger value
for C
F
reduces the peaking (overshoot) of the amplifier in
both frequency and time domains, but also decreases the
closed loop bandwidth (f
–3dB
). For example, while for a
closed loop gain (A
V
) of 5, C
F
= 0.8pF results in maximum
f
–3dB
(as previously shown in the Frequency Response vs
Closed Loop Gain graph of this data sheet), if C
F
= 1.2pF
is used, the amplifier exhibits no overshoot in the time
domain which is desirable in certain applications. Both the
circuits discussed in this section have been shown in the
Typical Applications section of this data sheet.
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Board Layout and Bypass Capacitors
For single supply applications, it is recommended that
high quality 0.1µF||1000pF ceramic bypass capacitors
be placed directly between each V
+
pin and its closest
V
pin with short connections. The V
pins (including the
Exposed Pad) should be tied directly to a low impedance
ground plane with minimal routing.
For dual (split) power supplies, it is recommended that
additional high quality 0.1µF||1000pF ceramic capacitors be
used to bypass V
+
pins to ground and V
pins to ground,
again with minimal routing.
For driving heavy differential loads (<200Ω), additional
bypass capacitance may be needed for optimal perfor-
mance. Keep in mind that small geometry (e.g., 0603)
surface mount ceramic capacitors have a much higher
self-resonant frequency than do leaded capacitors, and
perform best in high speed applications.
To prevent degradation in stability response, it is highly
recommended that any stray capacitance at the input
pins, +IN and –IN, be kept to an absolute minimum by
keeping printed circuit connections as short as possible.
This becomes especially true when the feedback resistor
network uses resistor values greater than 500Ω in circuits
with R
I
= R
F
.
At the output, always keep in mind the differential nature of
the LTC6409, because it is critical that the load impedances
seen by both outputs (stray or intended), be as balanced
and symmetric as possible. This will help preserve the
balanced operation of the LTC6409 that minimizes the
generation of even-order harmonics and maximizes the
rejection of common mode signals and noise.
The V
OCM
pin should be bypassed to the ground plane with
a high quality ceramic capacitor of at least 0.01µF. This
will prevent common mode signals and noise on this pin
from being inadvertently converted to differential signals
and noise by impedance mismatches both externally and
internally to the IC.
Driving ADCs
The LTC6409’s ground-referenced input, differential output
and adjustable output common mode voltage make it ideal
for interfacing to differential input ADCs. These ADCs are
typically supplied from a single-supply voltage and have
an optimal common mode input range near mid-supply.
The LTC6409 interfaces to these ADCs by providing single-
ended to differential conversion and common mode level
shifting.
The sampling process of ADCs creates a transient that is
caused by the switching in of the ADC sampling capaci-
tor. This momentarily shorts the output of the amplifier
as charge is transferred between amplifier and sampling
capacitor. The amplifier must recover and settle from this
load transient before the acquisition period has ended, for
a valid representation of the input signal. The LTC6409 will
settle quickly from these periodic load impulses. The RC
network between the outputs of the driver and the inputs
of the ADC decouples the sampling transient of the ADC
(see Figure 11). The capacitance serves to provide the
bulk of the charge during the sampling process, while
the two resistors at the outputs of the LTC6409 are used
to dampen and attenuate any charge injected by the ADC.
The RC filter gives the additional benefit of band limiting
broadband output noise. Generally, longer time constants
improve SNR at the expense of settling time. The resistors
in the decoupling network should be at least 10Ω. These
resistors also serve to decouple the LTC6409 outputs
from load capacitance. Too large of a resistor will leave
insufficient settling time. Too small of a resistor will not
properly dampen the load transient of the sampling process,
prolonging the time required for settling. In 16-bit applica-
tions, this will typically require a minimum of eleven RC
time constants. For lowest distortion, choose capacitors
with low dielectric absorption (such as a C0G multilayer
ceramic capacitor).
LTC6409
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+
3
SHDN
6
–IN
7
+OUT
2
+IN
1
–OUT
A
IN
+
A
IN
150Ω
4
V
+
V
+
V
+
5V
V
OCM
V
OCM
10
V
8
V
V
V
6409 F11
LTC6409
ADC
LTC2262-14
V
IN
SHDN
150Ω150Ω
100Ω
150Ω
0.1µF
33.2Ω
33.2Ω
10Ω
10Ω
5V
5
0.1µF||1000pF
0.1µF||1000pF
CONTROL
GND
V
DD
V
CM
D13
D0
0.1µF||1000pF
39pF
39pF
1.8V
F
1.3pF
1.3pF
F
9
V
+
applicaTions inForMaTion
Figure 11. Driving an ADC

LTC6409HUDB#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
High Speed Operational Amplifiers 10GHz GBW, 1.1nV/vHz Diff Amp/ADC Drvr
Lifecycle:
New from this manufacturer.
Delivery:
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