EVAL-ADE7751ZEB Datasheet EVAL-ADE7751ZEB, EVAL-ADE7755ZEB | P4-P6

REV. 0

EVAL-AD7751/AD7755EB

–4–

AD7751/AD7755 OUTPUT FREQUENCY SELECTION

AD7751 and AD7755 provide up to four different output fre-

quencies on F1 and F2. The output frequency selection is made

via the logic inputs S0 and S1—see AD7751/AD7755 data

sheet. On the evaluation board these inputs are set by using

jumpers JP15 and JP16. The logic input SCF is set via jumper

14 (JP14). For a full explanation of the AD7751/AD7755 out-

put frequency selection see the data sheet.

AD7751/AD7755 INPUT GAIN SELECTION

AD7751 and AD7755 provide up to four different gain settings

on the analog input Channel 1. These gain settings are 1, 2, 8

and 16. The gain selection on the evaluation board is made via

JP17 and JP18.

EXTERNAL CLOCK INPUT

AD7751 and AD7755 are specified with a CLKIN value of

3.579545 MHz. The evaluation board uses a crystal of this value

for the on-chip gate oscillator circuit. However, an input is

provided to allow an external clock source to be used. An imped-

ance matching resistor (R11) of 50 Ω is also available on the

board. NOTE: when using the on-chip oscillator this resistor

must be removed or the on-chip oscillator circuit will not start

up.

AGND AVDD

SK3ASK3B

SK5B

SK5C

SK5A

LOAD

V1N

V1P

JP1 = OPEN

JP2 = CLOSED

JP3 = OPEN

JP4 = OPEN

JP5 = OPEN

JP6 = OPEN

JP7 = OPEN

JP8 = OPEN

JP9 = OPEN

JP10 = CLOSED

JP11 = N

JP12 = B

JP19A = CLOSED

JP22 = CLOSED

JP20 = CLOSED

JP21 = CLOSED

JP14 = A

JP15 = B

JP16 = A

JP17 = A

JP18 = A

JP50 = P

JP51A = CLOSED

JP52 = CLOSED

R55 = REMOVED

2mV

6400

imp/kWhr

JP7

JP8

R53

C53

R54

SK1A

SK2B

SK2C

SHUNT

TP11

AGND

5.000V

1.9555 Hz

SK1B

NEUTRAL PHASE

218mV

V2P

220V

5.000V

R31

R56

JP52

JP51

R55

Figure 7. AD7755 Evaluation Board as an Energy Meter

AD7755 EVALUATION BOARD SET UP AS AN ENERGY

METER

Figure 7 shows a wiring diagram that allows a simple energy

meter to be implemented using the AD7755 evaluation board.

The current transducer used in this example is a shunt (400 µΩ).

The meter is intended to be used with a line voltage of 220 V

and a maximum current of 25 A. The frequency outputs F1 and

F2 can be used to drive a mechanical counter. These outputs

will be calibrated to provide 100 imp/kWhr. The logic output

CF has an output frequency that can be up to 128 times higher

than the frequency on F1 and F2. This output can be used for

calibration purposes and is shown connected to a frequency

counter via the optoisolator in Figure 7.

At maximum current (25 A), the power seen by the meter will

be 5.5 kW. This will produce a frequency of 0.153 Hz on F1

and F2 when these outputs are calibrated to 100imp/kWhr

(100imp/hr = 0.02777 Hz, 0.02777 × 5.5 = 0.153 Hz). From

Table III in the AD7755 data sheet, the closest frequency to

0.153 Hz in the half-scale ac inputs column is for F

, i.e., 0.17 Hz.

Therefore F

is selected by setting S0 = 1 and S1 = 0. The

choice of CF frequencies in this mode (see Table IV in the

AD7755 data sheet) are 32 times F1 and 64 times F1. For this

example 64 times F1 is selected by setting SCF = 1.

Since the voltage on Channel 1 is fixed, the only possible way of

calibrating (adjusting) the output frequency in F1 and F2 is by

varying the voltage on Channel 2. This is carried out by varying

the attenuation of the line voltage using the trim pot.

First we can calculate the voltage required in Channel 2 in order

to calibrate the frequency on the logic outputs F1 and F2 to

100imp/kWhr. The AD7755 data sheet gives the equation which

relates the voltage on Channel 1 and Channel 2 to the output

frequency on F1 and F2.

Freq

V V Gain F

REF

××× ×

−

806 1 2

(1)

First a current is selected for calibration, 5 A for example. This

gives a Channel 1 voltage of 400 µΩ × 5 A = 2 mV rms. The

gain of Channel 1 on the AD7755 is set to 16 (G0 = G1 = 1).

The on-chip or external reference of 2.5 V is selected using

JP13.

The output frequency at 5 A on F1 and F2 should be 0.02777 Hz

(100imp/kWhr) × 1.1 (220 V × 5 A = 1.1 kW) = 0.03055 Hz.

From Equation 1 the voltage on Channel 2 should be set to

218 mV. The attenuation network as shown in Figure 1 is used

to attenuate 220 V to 218 mV. R53 = 660 kΩ, R54 = 100 kΩ,

R56 = 500 Ω and the trim pot R31 = 500 Ω.

However, since the meter is being calibrated at CF and CF is

set to 64 times F1, the voltage on Channel 2 should be adjusted

until CF = 64 × 0.03055 Hz = 1.9555 Hz is registered on the

frequency counter. The counter should be set up to display the

average of ten frequency measurements on CF. This will

remove any ripple due to the instantaneous power signal. See

the AD7755 data sheet for more details.

REV. 0

EVAL-AD7751/AD7755EB

–5–

AD7751 EVALUATION BOARD SET UP AS AN ENERGY

METER

Figure 8 shows a wiring diagram that allows a simple energy

meter to be implemented using the AD7751 evaluation board.

Because the AD7751 monitors both the phase and neutral cur-

rents, isolation is required on at least one of the current trans-

ducers. One convenient way to provide isolation and eliminate

problems with matching is to use two CTs (current transform-

ers). The CTs are connected as shown in Figure 8. The CTs

have a turns ratio of 1:2500. The burden resistance for the CTs

can be placed on the evaluation board at SH1 and SH2. The

meter is intended to be used with a line voltage of 240 V and a

maximum current of 60 A. The frequency outputs F1 and F2

can be used to drive a mechanical counter. These outputs will

be calibrated to provide 100 imp/kWhr. The logic output CF

has an output frequency that can be up to 128 times higher than

the frequency on F1 and F2. This output can be used for cali-

bration purposes and is shown connected to a frequency counter

via the optoisolator in Figure 8.

R53

580kV

R31

500V

R54

12kV

SH1

1.2V

1:2500

7.2mV

V1A

AGND AVDD

SK3ASK3B

SK5B

SK5C

SK5A

LOAD

V1N

V1B

JP1 = OPEN

JP2 = OPEN

JP3 = OPEN

JP4 = CLOSED

JP5 = OPEN

JP6 = OPEN

JP7 = OPEN

JP8 = OPEN

JP9 = OPEN

JP10 = CLOSED

JP11 = N

JP12 = B

JP19A = CLOSED

JP22 = OPEN

JP20 = CLOSED

JP21 = CLOSED

JP14 = A

JP15 = A

JP16 = B

JP17 = A

JP18 = B

JP50 = P

JP51A = CLOSED

JP52 = CLOSED

R55 = REMOVED

3200

imp/kWhr

JP7

JP8

C53

SK1A

SK2

TP11

AGND

5.000V

3.2000 Hz

15A

SK1B

NEUTRAL

PHASE

278mV

V2P

240V

5.000V

JP52

JP51

R55

15A

SH1

1.2V

7.2mV

R56

500V

Figure 8. AD7751 Evaluation Board as an Energy Meter

At maximum current (60 A) the power see by the meter will

be 14.4 kW. This will produce a frequency of 0.4 Hz on the

logic outputs F1 and F2 when these outputs are calibrated to

100imp/kWhr (100imp/hr = 0.02777 Hz, 0.02777 × 14.4 =

0.4 Hz). From Table III in the AD7751 data sheet, the clos-

est frequency to 0.4 Hz in the half-scale ac inputs column is for

, i.e., 0.34 Hz. Therefore F

is selected by setting S0 = 0 and

S1 = 1. The choice of CF frequencies in this mode (see Table

IV in the AD7751 data sheet) are 16 times F1 and 32 times F1.

For this example 32 times F1 is selected by setting SCF = 1.

Since the voltage on Channel 1 is fixed, the only possible way of

calibrating (adjusting) the output frequency on F1 and F2 is by

varying the voltage on Channel 2. This is carried out by varying

the attenuation of the line voltage using the trim pot.

First we can calculate the voltage required on Channel 2 in

order to calibrate the frequency on F1 and F2 to 100imp/kWhr.

The AD7751 data sheet gives the equation which relates the

voltage on Channel 1 and Channel 2 to the output frequency on

F1 and F2.

Freq

V V Gain F

REF

××× ×

−

574 1 2

(2)

First a current is selected for calibration, 15 A for example. This

gives a Channel 1 voltage of 15 A/2500 × 1.2 Ω = 7.2 mV rms.

The gain of Channel 1 on the AD7755 is set to 8 (G0 = 0, G1 =

1). The on-chip or external reference of 2.5 V is selected using

JP13.

The output frequency at 15 A on F1 and F2 should be

0.02777 Hz (100imp/kWhr) × 3.6 (240 V × 15 A = 3.6 kW) =

0.1 Hz.

From Equation 2 the voltage on Channel 2 should be set to

278 mV. The attenuation network as shown in Figure 1 is used

to attenuate 240 V to 278 mV. R53 = 580 kΩ, R54 = 12 kΩ,

R56 = 500 Ω and the trim pot R31 = 500 Ω.

However since the meter is being calibrated at CF and CF is set

to 32 times F1, the voltage on Channel 2 should be adjusted

until CF = 32 × 0.1 Hz = 3.2 Hz is registered on the frequency

counter. The counter should be set up to display the average of

ten frequency measurements on CF. This will remove any ripple

due to the instantaneous power signal. See the AD7751 data

sheet for more details.

REV. 0

EVAL-AD7751/AD7755EB

–6–

JUMPER SELECTION

The AD7751/AD7755 evaluation board comes with several

jumper selections that allow the user to exercise all of the

AD7751 and AD7755 functionality. There are also some op-

tions such as attenuation networks and optically isolated outputs

that allow the AD7751 and AD7755 to be evaluated under the

same conditions as the end application. Table I outlines all the

jumper options and explains how they are used. Table I should

be used in conjugation with Figure 9, which will make it easier

to locate the jumper in question.

Table I.

Jumper Option Description

JP1 Closed Closing this jumper will short resistor R50

and connect analog input V1A directly to

SK2A. This has the effect of removing the

antialias filters from this input.

Open Antialias filter in input V1A is enabled.

JP2 Closed Analog input V1A is connected to analog

ground (AGND) via the antialias filter.

Open Normal operation.

JP3 Closed Closing this jumper will short resistor R51

and connect analog input V1N directly to

SK2B. This has the effect of removing the

antialias filters from this input.

Open Antialias filter in input V1A is enabled.

JP4 Closed Analog input V1N is connected to analog

ground (AGND) via the antialias filter.

This jumper should be closed if the AD7751

is being used as these inputs are used

single-ended on the AD7751.

Open When evaluating the AD7755, Channel 1

is best used in a differential mode and this

jumper should be left open. An example is

shown in Figure 4. In this example a shunt

is used to sense the current. The shunt can

be referenced to the AGND of the board

by using TP11 as shown.

JP5 Closed Closing this jumper will short resistor R52

and connect analog input V1B (V1P

AD7755) directly to SK2C. This has the

effect of removing the antialias filters from

this input.

Open Antialias filter in input V1A (V1P) is

enabled.

JP6 Closed Analog input V1B (V1P) is connected to

analog ground (AGND) via the antialias

filter.

Open Normal operation.

Jumper Option Description

JP7 Closed Closing this jumper will short resistors

R53 and R54. The analog input V2P is

connected directly to SK1A. This has the

effect of removing the antialias filter and

attenuation network from this input. Note:

if the board is being connected to a high

voltage, this jumper must be left open.

Open Antialias filter and attenuation network on

the input V2P is enabled.

JP8 Closed Analog input V1A is connected to analog

ground (AGND) via the antialias filter.

Note: SK1A is also connected to AGND

and care should be taken if this input is

connected to a high voltage source.

Open Normal operation.

JP9 Closed Closing this jumper will short resistor R57

and connect analog input V2N directly to

SK2B. This has the effect of removing the

antialias filters from this input.

Open Antialias filter in input V2N is enabled.

JP10 Closed Analog input V2N is connected to analog

ground (AGND) via the antialias filter.

This option should be selected if Channel

2 is being used in a single-ended mode.

Open V2N connected to SK2B for differential

operation.

JP11 N SK1B connected to V2N (AD7751/

AD7755).

P SK1B connected to V2P (AD7751/

AD7755).

JP12 A Logic input AD/DC is connected to

DGND.

B Logic input AD/DC is connected to

DVDD.

JP13 Open AD7751/AD7755 internal (on-chip) refer-

ence selected.

Closed External (AD780) reference selected.

JP14 1 SCF connected to DVDD.

0 SCF connected to DGND.

JP15 1 S1 connected to DVDD.

0 S1 connected to DGND.

JP16 1 S0 connected to DVDD.

0 S0 connected to DGND.

JP17 1 G1 connected to DVDD.

0 G1 connected to DGND.

JP18 1 G0 connected to DVDD.

0 G0 connected to DGND.

P1-P3 P4-P6 P7-P9 P10-P12

EVAL-ADE7751ZEB

Mfr. #:

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Manufacturer:

Analog Devices Inc.

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Data Conversion IC Development Tools EVAL BRD ADE7751

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