OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

NLAS44599DTG

P1-P3P4-P6P7-P9P10-P12P13-P13
© Semiconductor Components Industries, LLC, 2008
July, 2008 − Rev. 14
1 Publication Order Number:
NLAS44599/D
NLAS44599
Low Voltage Single Supply
Dual DPDT Analog Switch
The NLAS44599 is an advanced dual−independent CMOS double
pole−double throw (DPDT) analog switch fabricated with silicon
gate CMOS technology. It achieves high speed propagation delays
and low ON resistances while maintaining CMOS low power
dissipation. This DPDT controls analog and digital voltages that may
vary across the full power−supply range (from V
CC
to GND).
The device has been designed so the ON resistance (R
ON
) is much
lower and more linear over input voltage than R
ON
of typical CMOS
analog switches.
The channel select input is compatible with standard CMOS outputs.
The channel select input structure provides protection when
voltages between 0 V and 5.5 V are applied, regardless of the supply
voltage. This input structure helps prevent device destruction caused
by supply voltage − input/output voltage mismatch, battery backup,
hot insertion, etc.
The NLAS44599 can also be used as a quad 2−to−1 multiplexer−
demultiplexer analog switch with two Select pins that each controls
two multiplexer−demultiplexers.
• Channel Select Input Over−Voltage Tolerant to 5.5 V
• Fast Switching and Propagation Speeds
• Break−Before−Make Circuitry
• Low Power Dissipation: I
CC
= 2 A (Max) at T
A
= 25°C
• Diode Protection Provided on Channel Select Input
• Improved Linearity and Lower ON Resistance over Input Voltage
• Latch−up Performance Exceeds 300 mA
• ESD Performance: Human Body Model; > 2000 V,
Machine Model; > 200 V
• Chip Complexity: 158 FETs
• Pb−Free Packages are Available
MARKING
DIAGRAMS
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
TSSOP−16
DT SUFFIX
CASE 948F
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
QFN−16
MN SUFFIX
CASE 485G
16
AS
4459
ALYW
1
http://onsemi.com
Current
Part Marking
16
C
ALYW
1
Previous
Part Marking*
*Previous releases of this device may be marked as
shown in this diagram.
1
16
NLAS
4459
ALYW
1
16
NLAS44599
http://onsemi.com
2
QFN−16 PACKAGE
1
23
7568
9101112
13141516
COM A
NO A
0
V
CC
NC D
1
NC A
1
SAB
NO B
0
COM B
NC B1
GND
NO C
0
COM C
See TSSOP−16
Switch Configuration
COM D
NO D
0
SCD
NC C
1
4
FUNCTION TABLE
Select AB or CD On Channel
L
H
NC to COM
NO to COM
U
U
COM A
SELECT AB X1
NO A
0
U
NC A
1
Figure 1. Logic Diagram
TSSOP−16 PACKAGE
V
CC
NC D1
COM D
NO D0
SELECT CD
NC C
1
COM C
NO C
0
NC B
1
GND
NO B
0
COM B
NC A
1
COM A
NO A
0
SELECT AB
U
NO B
0
U
NC B
1
U
NO C
0
U
NC C
1
U
NO D
0
U
NC D
1
SELECT CD X1
U
COM B
U
COM C
U
COM D
0/1
2/3
0/1
2/3
0
1
2
3
0
1
2
3
116
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Figure 2. IEC Logic Symbol
NLAS44599
http://onsemi.com
3
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
Positive DC Supply Voltage *0.5 to )7.0 V
V
IS
Analog Input Voltage (V
NO
or V
COM
) *0.5 v V
IS
v V
CC
)0.5
V
IN
Digital Select Input Voltage *0.5 v V
I
v)7.0 V
I
IK
DC Current, Into or Out of Any Pin $50 mA
P
D
Power Dissipation in Still Air QFN−16
TSSOP−16
800
450
mW
T
STG
Storage Temperature Range *65 to )150 °C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds 260 °C
T
J
Junction Temperature Under Bias +150 °C
MSL Moisture Sensitivity Level 1
F
R
Flammability Rating Oxygen Index: 30% − 35% UL 94−V0 (0.125 in)
V
ESD
ESD Withstand Voltage Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
2000
200
1000
V
I
Latch−Up
Latch−Up Performance Above V
CC
and Below GND at 125°C (Note 4) $300 mA
JA
Thermal Resistance QFN−16
TSSOP−16
80
164
°C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to JESD22−C101−A.
4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage 2.0 5.5 V
V
IN
Digital Select Input Voltage GND 5.5 V
V
IS
Analog Input Voltage (NC, NO, COM) GND V
CC
V
T
A
Operating Temperature Range *55 )125 °C
t
r
, t
f
Input Rise or Fall Time, SELECT V
CC
= 3.3 V $ 0.3 V
V
CC
= 5.0 V $ 0.5 V
0
0
100
20
ns/V
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature 5C
Time, Hours Time, Years
80 1,032,200 117.8
90 419,300 47.9
100 178,700 20.4
110 79,600 9.4
120 37,000 4.2
130 17,800 2.0
140 8,900 1.0
1
1 10 100
1000
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Figure 3. Failure Rate vs. Time Junction Temperature
NORMALIZED FAILURE RATE
TIME, YEARS
T
J
= 130°C
T
J
= 120°C
T
J
= 110°C
T
J
= 100°C
T
J
= 90°C
T
J
= 80°C
P1-P3P4-P6P7-P9P10-P12P13-P13

NLAS44599DTG

Mfr. #:
Buy NLAS44599DTG
Manufacturer:
ON Semiconductor
Description:
Multiplexer Switch ICs Dual DPDT ANLG Sw. -55 to 125deg C
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet