AT17C/LV65/128/256
7
AC Characteristics
AC Characteristics When Cascading
T
SCE
T
OE
T
CE
T
LC
T
HC
T
CAC
T
OH
T
HOE
T
DF
T
OH
T
SCE
T
HCE
CE
RESET/OE
CLK
DATA
T
CDF
T
OCK
T
OCE
T
OCE
T
OOE
FIRST BIT
LAST BIT
CE
RESET/OE
CLK
DATA
CEO
AT17C/LV65/128/256
8
Notes: 1. Preliminary specifications for military operating range only.
2. AC test load = 50 pF.
3. Float delays are measured with 5 pF AC loads. Transition is measured ±200 mV from steady state active levels.
AC Characteristics for AT17C65/128
V
CC
= 5V ± 5% Commercial/V
CC
= 5V ± 10% Ind./Mil.
Symbol Description
Commercial Industrial/Military
(1)
UnitsMin Max Min Max
T
OE
(2)
OE to Data Delay 30 35 ns
T
CE
(2)
CE to Data Delay 50 50 ns
T
CAC
(2)
CLK to Data Delay 50 55 ns
T
OH
Data Hold from CE, OE, or CLK 0 0 ns
T
DF
(3)
CE or OE to Data Float Delay 50 50 ns
T
LC
CLK Low Time 30 35 ns
T
HC
CLK High Time 30 35 ns
T
SCE
CE Setup Time to CLK (to guarantee proper counting) 45 50 ns
T
HCE
CE Hold Time from CLK (to guarantee proper counting) 0 0 ns
T
HOE
OE High Time (guarantees counter is reset) 25 25 ns
F
MAX
MAX Input Clock Frequency 12.5 12.5 MHz
AC Characteristics for AT17C128 When Cascading
V
CC
= 5V± 5% Commercial/V
CC
= 5V ± 10% Ind./Mil.
Symbol Description
Commercial Industrial/Military
(1)
UnitsMin Max Min Max
T
CDF
(3)
CLK to Data Float Delay 50 50 ns
T
OCK
(2)
CLK to CEO Delay 55 60 ns
T
OCE
(2)
CE to CEO Delay 55 60 ns
T
OOE
(2)
RESET/OE to CEO Delay 40 45 ns
F
MAX
MAX Input Clock Frequency 8 8 MHz
AT17C/LV65/128/256
9
Notes: 1. Preliminary specifications for military operating range only.
2. AC test load = 50 pF.
3. Float delays are measured with 5 pF AC loads. Transition is measured ±200 mV from steady state active levels.
AC Characteristics for AT17C256
V
CC
= 5V ±5% Commercial/V
CC
= 5V ± 10% Ind./Mil.
Symbol Description
Commercial Industrial/Military
(1)
UnitsMin Max Min Max
T
OE
(2)
OE to Data Delay 30 35 ns
T
CE
(2)
CE to Data Delay 45 45 ns
T
CAC
(2)
CLK to Data Delay 50 55 ns
T
OH
Data Hold from CE, OE, or CLK 0 0 ns
T
DF
(3)
CE or OE to Data Float Delay 50 50 ns
T
LC
CLK Low Time 20 20 ns
T
HC
CLK High Time 20 20 ns
T
SCE
CE Setup Time to CLK (to guarantee proper counting) 35 40 ns
T
HCE
CE Hold Time from CLK (to guarantee proper counting) 0 0 ns
T
HOE
OE High Time (guarantees counter is reset) 20 20 ns
F
MAX
MAX Input Clock Frequency 12.5 12.5 MHz
AC Characteristics for AT17C256 When Cascading
V
CC
= 5V±5% Commercial/V
CC
= 5V ± 10% Ind./Mil.
Symbol Description
Commercial Industrial/Military
(1)
UnitsMin Max Min Max
T
CDF
(3)
CLK to Data Float Delay 50 50 ns
T
OCK
(2)
CLK to CEO Delay 35 40 ns
T
OCE
(2)
CE to CEO Delay 35 35 ns
T
OOE
(2)
RESET/OE to CEO Delay 30 35 ns
F
MAX
MAX Input Clock Frequency 10 10 MHz

AT17C65-10JC

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
FPGA - Configuration Memory
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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