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MC10EL33DTR2

P1-P3P4-P6P7-P8
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 11
1 Publication Order Number:
MC10EL33/D
MC10EL33, MC100EL33
5 V ECL ÷4 Divider
Description
The MC10EL/100EL33 is an integrated ÷4 divider. The differential
clock inputs and the V
BB
allow a differential, single-ended or AC coupled
interface to the device. The V
BB
pin, an internally generated voltage
supply, is available to this device only. For single-ended input conditions,
the unused differential input is connected to V
BB
as a switching reference
voltage. V
BB
may also rebias AC coupled inputs. When used, decouple
V
BB
and V
CC
via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
should be left open.
The reset pin is asynchronous and is asserted on the rising edge. Upon
power-up, the internal flip-flops will attain a random state; the reset allows
for the synchronization of multiple EL33’s in a system.
The 100 Series contains temperature compensation.
Features
• 650 ps Propagation Delay
• 4.0 GHz Toggle Frequency
• ESD Protection:
♦ > 1 kV Human Body Model
♦ > 100 V Machine Model
• PECL Mode Operating Range: V
CC
= 4.2 V to 5.7 V with V
EE
= 0 V
• NECL Mode Operating Range: V
CC
= 0 V with V
EE
= −4.2 V to −5.7 V
• Internal Input Pulldown Resistors on CLK(s) and R.
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity:
♦ Level 1 for SOIC−8 NB
♦ Level 3 for TSSOP−8
♦ For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 95 Devices
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
Figure 1. Logic Diagram and Pinout Assignment
4
3
1
2
5
6
7
8
Q
V
EE
V
CC
QCLK
V
BB
R
÷4
Reset
CLK
*For additional marking information, refer to
Application Note AND8002/D
.
MARKING DIAGRAMS*
KL33
ALYWG
G
SOIC−8 NB
D SUFFIX
CASE 751−05
1
8
TSSOP−8
DT SUFFIX
CASE 948R−02
1
8
1
8
ORDERING INFORMATION
www.onsemi.com
KEL33
ALYW
G
1
8
HL33
ALYWG
G
1
8
HEL33
ALYW
G
1
8
(Note: Microdot may be in either location)
H = MC10
K = MC100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb-Free Package
SOIC−8 NB TSSOP−8
See detailed ordering and shipping information on page 6 of
this data sheet.
MC10EL33, MC100EL33
www.onsemi.com
2
Table 1. PIN DESCRIPTION
Pin Function
CLK, CLK
Reset
Q, Q
V
BB
V
CC
V
EE
ECL Clock Inputs*
ECL Asynch Reset*
ECL Data Outputs
Reference Voltage Output
Positive Supply
Negative Supply
*Pins will default low when left open.
Table 2. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
PECL Mode Power Supply V
EE
= 0 V 8 V
V
EE
NECL Mode Power Supply V
CC
= 0 V −8 V
V
I
PECL Mode Input Voltage
NECL Mode Input Voltage
V
EE
= 0 V
V
CC
= 0 V
V
I
≤ V
CC
V
I
≥ V
EE
6
−6
V
I
out
Output Current Continuous
Surge
50
100
mA
I
BB
V
BB
Sink/Source ±0.5 mA
T
A
Operating Temperature Range −40 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
q
JA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
SOIC−8 NB
SOIC−8 NB
190
130
°C/W
q
JC
Thermal Resistance (Junction-to-Case) Standard Board SOIC−8 NB 41 to 44 °C/W
q
JA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
q
JC
Thermal Resistance (Junction-to-Case) Standard Board TSSOP−8 41 to 44 ±5% °C/W
T
sol
Wave Solder (Pb-Free) < 2 to 3 sec @ 260°C 265 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
MC10EL33, MC100EL33
www.onsemi.com
3
Table 3. 10EL SERIES PECL DC CHARACTERISTICS (V
CC
= 5.0 V; V
EE
= 0.0 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Power Supply Current 27 33 27 33 27 33 mA
V
OH
Output HIGH Voltage (Note 2) 3920 4010 4110 4020 4105 4190 4090 4185 4280 mV
V
OL
Output LOW Voltage (Note 2) 3050 3200 3350 3050 3210 3370 3050 3227 3405 mV
V
IH
Input HIGH Voltage (Single-Ended) 3770 4110 3870 4190 3940 4280 mV
V
IL
Input LOW Voltage (Single-Ended) 3050 3500 3050 3520 3050 3555 mV
V
BB
Output Voltage Reference 3.57 3.7 3.65 3.75 3.69 3.81 V
V
IHCMR
Input HIGH Voltage Common Mode
Range (DIfferential Configuration) (Note 3)
2.5 4.6 2.5 4.6 2.5 4.6 V
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.5 0.3
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.25 V / −0.5 V.
2. Outputs are terminated through a 50 W resistor to V
CC
− 2.0 V.
3. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential input
signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V
PP
min and 1 V.
Table 4. 10EL SERIES NECL DC CHARACTERISTICS (V
CC
= 0.0 V; V
EE
= −5.0 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Power Supply Current 27 33 27 33 27 33 mA
V
OH
Output HIGH Voltage (Note 2) −1080 −990 −890 −980 −895 −810 −910 −815 −720 mV
V
OL
Output LOW Voltage (Note 2) −1950 −1800 −1650 −1950 −1790 −1630 −1950 −1773 −1595 mV
V
IH
Input HIGH Voltage (Single-Ended) −1230 −890 −1130 −810 −1060 −720 mV
V
IL
Input LOW Voltage (Single-Ended) −1950 −1500 −1950 −1480 −1950 −1445 mV
V
BB
Output Voltage Reference −1.43 −1.30 −1.35 −1.25 −1.31 −1.19 V
V
IHCMR
Input HIGH Voltage Common Mode
Range (DIfferential Configuration) (Note 3)
−2.5 −0.4 −2.5 −0.4 −2.5 −0.4 V
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.5 0.3
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.25 V / −0.5 V.
2. Outputs are terminated through a 50 W resistor to V
CC
− 2.0 V.
3. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential input
signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V
PP
min and 1 V.
P1-P3P4-P6P7-P8

MC10EL33DTR2

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Buy MC10EL33DTR2
Manufacturer:
ON Semiconductor
Description:
Clock Drivers & Distribution 5V ECL Divide By 4
Lifecycle:
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