The cursor segment is controlled differently. A single
register selects one digits cursor from the entire dis-
play, and that can be lit either continuously or blinking.
All the other digits cursors are off.
The designations of DP, cursor, and annunciator are
interchangeable. For example, consider an application
requiring only one DP lit at a time, but the DP needs to
blink. The DP function does not have blink capability.
Instead, the DP segments on the display are routed
(using the output map) to the cursor function. In this
case, the DP segments are controlled using the cursor
register.
The output of the controller is a 4-wire serial stream that
interfaces to industry-standard, shift-register, high-volt-
age grid/anode VFD tube drivers (Figure 4). This inter-
face uses three outputs to transfer and latch grid and
anode data into the tube drivers, and a fourth output
that enables/disables the tube driver outputs (Figure 5).
The enable/disable control is modulated by the
MAX6852 for both PWM intensity control and interdigit
blanking, and disables the tube driver in shutdown. The
controller multiplexes the display by enabling each grid
of the VFD in turn for 100µs (OSC = 4MHz) with the cor-
rect segment (anode) data. The data for the next grid is
transferred to the tube drivers during the display time of
the current grid.
The controller uses an internal output map to match any
tube-drivers shift-register grid/anode order, and is
therefore compatible with all VFD internal chip-in-glass
or external tube drivers.
The MAX6852 provides five high-current output ports,
which can be configured for a variety of functions:
The PUMP output can be configured as either an
80kHz (OSC = 4MHz) clock intended for DC-DC con-
verter use, the 4-wire serial interfaces DOUT data out-
put, or a general-purpose logic output.
The PHASE1 and PHASE2 outputs can be individually
configured as either 10kHz PWM outputs (OSC =
4MHz) intended for filament driving, blink status out-
puts, or general-purpose logic outputs.
MAX6852
4-Wire Interfaced, 5
7 Matrix Vacuum-
Fluorescent Display Controller
_______________________________________________________________________________________ 7
GRID 1 GRID 2 GRID 3 GRID 4 GRID 5 GRID 6 GRID 7 GRID 8
Figure 2. Example of a Two-Digits-per-Grid Display (8 Grids, 16 Digits)
°C °FpH mW
4 ANNUNCIATOR SEGMENTS
DECIMAL POINT (DP) SEGMENT
CURSOR SEGMENT
5 x 7 MATRIX CHARACTER
WITH 35 SEGMENTS
Figure 3. Digit Structure with 5
7 Matrix Character, DP
Segment, Cursor Segment, Four Annunciators
MAX6852
VFCLK
VFDOUT
VFLOAD
DIN
SCLK
VFBLANK
VFDIN
VFCLK
VFLOAD
VFBLANK
MICROCONTROLLER
VFD TUBE DRIVER
CS
DOUT
SCLK
CS
VFD TUBE
GRID/
ANODE
DRIVERS
Figure 4. Connection of the MAX6852 to VFD Driver and VFD Tube
MAX6852
The PORT0 and PORT1 outputs can be individually
configured as either 625Hz, 1250Hz, or 2500Hz clocks
(OSC = 4MHz) intended for buzzer driving, the 4-wire
serial interfaces DOUT data output, blink or shutdown
status outputs, or general-purpose logic outputs.
Display Modes
The MAX6852 has two display modes (Table 1), select-
ed by the M bit in the configuration register (Table 21).
The display modes trade the maximum allowable num-
ber of digits (96/2 mode) against the availability of
annunciator segments (48/1 mode). Table 2 is the reg-
ister address map.
Initial Power-Up
On initial power-up, all control registers are reset, the
display segment and annunciator data are cleared,
intensity is set to minimum, and shutdown is enabled
(Table 3).
Character Registers
The MAX6852 uses 48 character registers (48/1 mode)
(Table 4) or 96 character registers (96/2 mode) (Table
5) to store the 5 x 7 characters (Table 6). Each digit is
represented by 1 byte of memory. The data in the char-
acter registers does not control the character segments
directly. Instead, the register data is used to address a
character generator, which stores the data of the 128-
character font (Table 7). The lower 7 bits of the charac-
ter data (D6 to D0) select a character from the font
table. The most significant bit (MSB) of the register data
(D7) controls the DP segment of the digit; it is set to
light the DP, cleared to leave it unlit.
The character registers address maps are shown in
Table 4 (48/1 mode) and Table 5 (96/2 mode).
In 48/1 mode, the character registers use a single
address range 0x20 to {0x20 + g}, where g is the value
in the grids register (Table 24). The 48/1 mode upper
address limit, when g is 0x2F, is therefore 0x4F. The
address range 0x50 to 0x7F is used for annunciator
data in 48/1 mode.
In 96/2 mode, the character registers use two address
ranges. The first rows address range is 0x20 to
{0x20 + g}. The second rows address range is 0x50 to
{0x50 + g}. Therefore, in 96/2 mode, the character regis-
ters are only one contiguous memory range when a 48-
grid display is used.
Character Generator Font Mapping
The font is a 5 x 7 matrix comprising 104 characters in
ROM, and 24 user-definable characters. The selection
from the total of 128 characters is represented by the
lower 7 bits of the 8-bit digit registers. The MSB, shown
as x in the ROM map (Table 7), controls the DP seg-
ment of the digit; it is set to light the DP, cleared to
leave it unlit.
The character map follows the Arial font for 96 charac-
ters in the x0100000 through x1111111 range. The first
32 characters map the 24 user-definable positions
(RAM00 to RAM23), plus eight extra common charac-
ters in ROM.
User-Defined Fonts
The 24 user-definable characters are represented by
120 entries of 7-bit data, five entries per character, and
are stored in the MAX6852s internal RAM.
The 120 user-definable font data entries are written and
read through a single register, address 0x05. An
autoincrementing font address pointer in the MAX6852
indirectly accesses the font data. The font address
pointer can be written, setting one of 120 addresses
between 0x00 and 0xF7, but cannot be read back. The
font data is written to and read from the MAX6852 indi-
rectly, using this font address pointer. Unused font
locations can be used as general-purpose scratch
RAM, noting that the font registers are only 7 bits wide,
not 8.
4-Wire Interfaced, 5
7 Matrix Vacuum-
Fluorescent Display Controller
8 _______________________________________________________________________________________
SERIAL-TO-PARALLEL SHIFT REGISTER
LATCHES
VFCLK
VFDIN
VFLOAD
VFBLANK
O0
O0
O1
O1
O2
O2
ON
ON
VFD TUBE DRIVER
VFD TUBE SIMPLIFIED
Figure 5. Block Diagram of VFD Tube Driver and VFD Tube
MAX6852
4-Wire Interfaced, 5
7 Matrix Vacuum-
Fluorescent Display Controller
_______________________________________________________________________________________ 9
DISPLAY
MODE
MAXIMUM NO. OF DIGITS
MAXIMUM NO. OF
ANNUNCIATORS
MAXIMUM NO.
OF GRIDS
DIGITS COVERED
BY EACH GRID
48/1 mode
48 digits, each with a DP segment and a cursor
segment
4 per digit 1 digit per grid
96/2 mode
96 digits, each with a DP segment and a cursor
segment
None
48 grids
2 digits per grid
Table 1. Display Modes
COMMAND ADDRESS
REGISTER
D15 D14 D13 D12 D11 D10 D9 D8
HEX
CODE
No-op
R/W
0000000 0x00
VFBLANK polarity
R/W
0000001 0x01
Intensity
R/W
0000010 0x02
Grids
R/W
0000011 0x03
Configuration
R/W
0000100 0x04
User-defined fonts
R/W
0000101 0x05
Output map
R/W
0000110 0x06
Display test and device ID
R/W
0000111 0x07
PUMP register
R/W
0001000 0x08
Filament duty cycle
R/W
0001001 0x09
PHASE1
R/W
0001010 0x0A
PHASE2
R/W
0001011 0x0B
PORT0
R/W
0001100 0x0C
PORT1
R/W
0001101 0x0D
Shift limit
R/W
0001110 0x0E
Cursor
R/W
0001111 0x0F
Factory reserved. Do not write to register. X 0010000 0x10
Table 2. Register Address Map
Table 8 shows how to use the single user-defined font
register 0x05 to set the font address pointer, write font
data, and read font data. A read action always returns
font data from the font address pointer position. A write
action sets the 7-bit font address pointer if the MSB is
set, or writes 7-bit font data to the font address pointer
position if the MSB is clear.
The font address pointer autoincrements after a valid
access to the user-definable font data. Autoincrementing
allows the 120-font data entries to be written and read
back very quickly because the font pointer address need
only be set once. After the last data location 0xF7 has
been written, further font data entries are ignored until the
font address pointer is reset. If the font address pointer is
set to an out-of-range address by writing data in the 0xF8
to 0xFF range, then address 0x80 is set instead (Table 9).
Table 10 shows the user-definable font pointer base
addresses.
Table 11 shows an example of data (characters 0, 1,
and 2) being stored in the first three user-defined font
locations, illustrating the orientation of the data bits.

4-103321-0-27

Mfr. #:
Manufacturer:
TE Connectivity
Description:
CONN HEADER VERT 27POS 2.54MM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union