MAX5104EEE+T

MAX5104
Low-Power, Dual, Voltage-Output, 12-Bit DAC
with Serial Interface
10 ______________________________________________________________________________________
Serial-Data Output
The serial-data output, DOUT, is the internal shift register’s
output. DOUT allows for daisy chaining of devices and
data readback. The MAX5104 can be programmed to
shift data out of DOUT on SCLK’s falling edge (Mode 0)
or on the rising edge (Mode 1). Mode 0 provides a lag
of 16 clock cycles, which maintains compatibility with
SPI/QSPI and MICROWIRE interfaces. In Mode 1, the
output data lags 15.5 clock cycles. On power-up, the
device defaults to Mode 0.
User-Programmable Logic Output
User-programmable logic output (UPO) allows an external
device to be controlled through the serial interface
(Table 1), thereby reducing the number of microcontroller
I/O pins required. On power-up, UPO is low.
Power-Down Lockout Input
The power-down lockout (PDL) pin disables software
shutdown when low. When in power-down, transitioning
PDL from high to low wakes up the part with the output
set to the state prior to power-down. PDL can also be
used to asynchronously wake up the device.
Daisy-Chaining Devices
Any number of MAX5104s can be daisy-chained by
connecting the DOUT pin of one device to the DIN pin
of the following device in the chain (Figure 7).
Since the MAX5104’s DOUT pin has an internal active
pull-up, the DOUT sink/source capability determines the
time required to discharge/charge a capacitive load.
See the digital output V
OH
and V
OL
specifications in the
Electrical Characteristics
.
Figure 8 shows an alternate method of connecting several
MAX5104s. In this configuration, the data bus is common
to all devices; data is not shifted through a daisy chain.
More I/O lines are required in this configuration because
a dedicated chip-select input (CS) is required for each IC.
__________Applications Information
Unipolar Output
Figure 9 shows the MAX5104 configured for unipolar,
rail-to-rail operation with a gain of +2V/V. The MAX5104
can produce a 0 to 4.096V output with a 2.048V reference
(Figure 9). Table 2 lists the unipolar output codes. An
offset to the output can be achieved by connecting a
voltage to OS_, as shown in Figure 10. By applying
V
OS_
= -1V, the output values will range between 1V
and (1V + V
REF
· 2).
Bipolar Output
The MAX5104 can be configured for a bipolar output
(Figure 11). The output voltage is given by the equation
(OS_ = AGND):
Table 2. Unipolar Code Table (Gain = +2)
MAX5104
DAC_
GAIN = +2V/V
REF_
OUT_
OS_
DGNDAGND
+5V/+3V
V
DD
R
R
Figure 9. Unipolar Output Circuit (Rail-to-Rail)
MAX5104
DAC _
AGND DGND
REF_
OUT_
OS_
V
OS
+5V/+3V
V
DD
R
R
ANALOG OUTPUT
1111 1111 1111 (0)
1000 0000 0001 (0)
DAC CONTENTS
MSB LSB
1000 0000 0000 (0)
0111 1111 1111 (0)
0000 0000 0000 (0) 0V
0000 0000 0001 (0)
+V
4095
4096
2
REF
+V
2049
4096
REF
2
+V
2048
4096
V
REF REF
=
2
+V
2047
4096
REF
2
+V
1
4096
REF
2
Figure 10. Setting OS_ for Output Offset
Note: ( ) are for the sub-bit.
MAX5104
Low-Power, Dual, Voltage-Output, 12-Bit DAC
with Serial Interface
______________________________________________________________________________________ 11
MAX5104
V
OUT
= V
REF
[((2 · NB) / 4096) - 1]
where NB represents the numeric value of the DAC’s
binary input code. Table 3 shows digital codes and the
corresponding output voltage for Figure 11’s circuit.
Using an AC Reference
In applications where the reference has an AC signal
component, the MAX5104 has multiplying capabilities
within the reference input voltage range specifications.
Figure 12 shows a technique for applying a sinusoidal
input to REF_, where the AC signal is offset before
being applied to the reference input.
Harmonic Distortion and Noise
The total harmonic distortion plus noise (THD+N) is typ-
ically less than -78dB at full scale with a 1Vp-p input
swing at 5kHz.
Digital Calibration and
Threshold Selection
Figure 13 shows the MAX5104 in a digital calibration
application. With a bright-light value applied to the pho-
todiode (on), the DAC is digitally ramped until it trips
the comparator. The microprocessor (µP) stores this
“high” calibration value. Repeat the process with a dim
light (off) to obtain the dark current calibration.
Table 3. Bipolar Code Table
ANALOG OUTPUT
1111 1111 1 111 (0)
1000 0000 0 001 (0)
DAC CONTENTS
MSB LSB
1000 0000 0 000 (0) 0V
0111 1111 1 111 (0)
0000 0000 0 000 (0)
0000 0000 0 001 (0)
+V
2047
2048
REF
+V
1
2048
REF
-V
1
2048
REF
+V
2047
4096
REF
2
-V
2048
2048
-V
REF REF
=
AGNDDGND
R
R
MAX5104
DAC _
REF_
OS_
OUT_
10k 10k
10k
10k
V-
V+
V
DD
V
OUT
+5V/+3V
Figure 11. Bipolar Output Circuit
DAC_
OUT_
MAX5104
10k
26k
OS_
REF
R
R
V
DD
DGNDAGND
+5V/
+3V
AC
REFERENCE
INPUT
500mVp-p
MAX495
+5V/+3V
Figure 12. AC Reference Input Circuit
AGND
DIN
µP
DGND
MAX5104
DAC _
REF_
OS_
OUT_
R
R
V-
V+
PHOTODIODE
V+
V
DD
V
OUT
R
PULLDOWN
+5V/+3V
Figure 13. Digital Calibration
Note: ( ) are for the sub-bit.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
MAX5104
Low-Power, Dual, Voltage-Output, 12-Bit DAC
with Serial Interface
The µP then programs the DAC to set an output voltage
at the midpoint of the two calibrated values. Applications
include tachometers, motion sensing, automatic readers,
and liquid-clarity analysis.
Digital Control of Gain and Offset
The two DACs can be used to control the offset and gain
for curve-fitting nonlinear functions, such as transducer
linearization or analog compression/expansion applica-
tions. The input signal is used as the reference for the
gain-adjust DAC, whose output is summed with the output
from the offset-adjust DAC. The relative weight of each
DAC output is adjusted by R1, R2, R3, and R4 (Figure 14).
Power-Supply Considerations
On power-up, the input and DAC registers clear (set to
zero code). For rated performance, V
REF_
should be at
least 1.4V below V
DD
. Bypass the power supply with a
4.7µF capacitor in parallel with a 0.1µF capacitor to
AGND. Minimize lead lengths to reduce lead inductance.
Grounding and Layout Considerations
Digital and AC transient signals on AGND can create
noise at the output. Connect AGND to the highest quality
ground available. Use proper grounding techniques,
such as a multilayer board with a low-inductance ground
plane. Carefully lay out the traces between channels to
reduce AC cross-coupling and crosstalk. Wire-wrapped
boards and sockets are not recommended. If noise
becomes an issue, shielding may be required.
Chip Information
TRANSISTOR COUNT: 3053
SUBSTRATE CONNECTED TO AGND
AGND DGND
MAX5104
DACA
V
DD
REFA
V
IN
V
REF
CS
SCLK
DIN
REFB
R1
R3
R
R
R
R
R4
R2
OUTB
OSB
OUTA
OSA
V
OUT
DACB
INPUT
REG A
INPUT
REG B
DAC
REG A
DAC
REG B
– OFFSET
[ ]
V
OUT
=
=
GAIN
[ ]
2NA
4096
NA IS THE NUMERIC VALUE OF THE INPUT CODE FOR DACA.
NB IS THE NUMERIC VALUE OF THE INPUT CODE FOR DACB.
R2
R1+R2
R4
R3
2NB
4096
R4
R3
(
V
IN
)(
)(
1+
)
(
V
REF
)(
)
[ ] [ ]
SHIFT
REGISTER
Figure 14. Digital Control of Gain and Offset
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
AGND V
DD
OUTB
OSB
REFB
PDL
UPO
DOUT
DGND
TOP VIEW
MAX5104
QSOP
OUTA
OSA
CS
REFA
CL
DIN
SCLK
Pin Configuration
Package Information
Package information is available on Maxim’s website:
www.maxim-ic.com.

MAX5104EEE+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Digital to Analog Converters - DAC 12-Bit 2Ch Precision DAC
Lifecycle:
New from this manufacturer.
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