Data Sheet ADA4312-1
Rev. A | Page 9 of 12
APPLICATIONS INFORMATION
11044-017
ADA4312-1
+
ADA4312-1
+
V
CC
V
CC
R
L
1:1
R
BT
R
BT
R
F
R
G
R
F
C
IN
C
IN
R
BIAS
R
BIAS
10k
10k
R
IADJ
0.1µF
0.1µF 10µF
Figure 17. Typical G.hn Application Circuit
FEEDBACK RESISTOR SELECTION
The feedback resistor value has a direct impact on the closed-
loop bandwidth of the current feedback amplifiers used in the
architecture of the ADA4312-1 differential line driver. Table 5
provides a guideline for the selection of feedback resistor values
used in typical differential line driver circuits (refer to Figure 17).
Table 5. Resistor Values and Frequency Performance
Gain R
F
(Ω) R
G
(Ω) −3 dB SS BW (MHz)
16 V/V 732 97.6 195
12 V/V 750 137 200
8 V/V 768 221 209
4 V/V 806 536 222
Selecting a feedback resistor with a value that is lower than the
values in Table 5 can create peaking in the frequency response;
in extreme cases, this peaking can lead to instability. Conversely,
a feedback resistor that exceeds the values in Table 5 can limit
the closed-loop bandwidth.
GENERAL OPERATION
The ADA4312-1 is a differential line driver designed for single-
supply operation in G.hn line driver applications. The core
architecture comprises two high speed current feedback amplifiers.
The inputs of these amplifiers are arranged in a unique way that
facilitates extended differential bandwidth, linearity, and stability
while limiting common-mode bandwidth and enhancing
common-mode stability.
The patented input stage of the core amplifiers is not conducive
to operating either core amplifier independently. The ADA4312-1
input stage is designed to operate only in differential applications
similar to the circuit shown in Figure 17.
HALF-DUPLEX OPERATION
In systems such as G.hn PLC modems, half-duplex or time-
division duplex (TDD) systems require the line driver to be
switched between transmit mode and high output impedance
receive mode. The ADA4312-1 is equipped with a shutdown pin
(SD, Pin 9) that stops the line driver from transmitting while
switching the outputs to a high output impedance equivalent to
10 kΩ in parallel with 2R
F
+ R
G
(see Figure 17). The shutdown
(SD) pin is compatible with standard 3.3 V CMOS logic. If the
SD pin is left floating, an internal pull-up resistor places the
output in a disabled, high output impedance state. SD logic is
referred to GND (Pin 4), which should be connected to 0 V.
ESTABLISHING V
MID
In single-supply applications such as the one shown in
Figure 17, it is necessary to establish a midsupply operating
point (V
MID
). To establish V
MID
, use two 10 kΩ resistors to form
a resistor divider from V
CC
to ground and a 0.1 µF ceramic chip
capacitor for decoupling. Place the V
MID
decoupling capacitor
and the R
BIAS
resistors as close as possible to the ADA4312-1.
BIAS CONTROL AND LINEARITY
The ADA4312-1 is equipped with a biasing adjustment feature
that lowers the quiescent operating current. A resistor (R
IADJ
)
must be placed between I
ADJ
(Pin 5) and GND (Pin 4) for proper
operation of the ADA4312-1. Using a resistor larger than 0
reduces the quiescent current of the line driver and improves
efficiency in transmit mode. Figure 13 shows the quiescent
current vs. R
IADJ
.
ADA4312-1 Data Sheet
Rev. A | Page 10 of 12
Note that there is a trade-off between the adjusted quiescent
current and the linearity (or MTPR) of the transmitted signal.
Multitone power ratio (MTPR) was monitored at 5 MHz,
17 MHz, 28 MHz, 31 MHz, 59 MHz, and 82 MHz. Figure 18
can be used to gauge the approximate degradation of MTPR
vs. R
IADJ
and quiescent current while transmitting the G.hn
signal across a 40 differential load in the circuit shown in
Figure 17.
–70
–65
–60
–55
–50
–45
–40
0 10 20 30 40 50 60 70 80 90
MTPR (dBc)
FREQUENCY (MHz)
8kΩ, I
Q
= 11mA
4kΩ, I
Q
= 18mA
1kΩ, I
Q
= 33mA
0Ω, I
Q
= 46.5mA
2kΩ, I
Q
= 26mA
11044-021
Figure 18. MTPR vs. R
IADJ
PCB LAYOUT
As is the case with many high speed line driver applications, care-
ful attention to printed circuit board (PCB) layout can improve
performance and help maintain stability while preventing excessive
die temperatures during normal operation. Differential signal
balance can be maintained by using symmetry in the PCB layout
of input and output signal traces.
Keeping the input and output traces as short as possible helps
prevent excessive parasitics from affecting overall performance
and stability. Keep the feedback resistors and gain setting resistor
as close to the line driver as physically possible. The back termi-
nation resistors and line coupling transformer should be placed
as close to the ADA4312-1 outputs as possible.
For more information about high speed board layout, see A
Practical Guide to High-Speed Printed-Circuit-Board Layout
(Analog Dialogue, Volume 39, September 2005).
THERMAL MANAGEMENT
The thermal pad of the ADA4312-1 is an electrically isolated
copper pad that should be soldered to an external thermal
ground plane. The number of thermal vias that connect the
exposed pad of the ADA4312-1 to the PCB can influence the
thermal conductivity of the PCB assembly. Moving heat away
from the ADA4312-1 die to the ambient environment is the
objective of a PCB designed in accordance with the guidelines
found in the AN-772 Application Note.
The outer layers of the PCB are the best choice to radiate heat
into the environment by convection. Conducting heat away
from the ADA4312-1 die into the outer layers of the PCB can
be accomplished with nine thermal vias connecting the exposed
pad to both outer layers. The vias can be spaced 0.75 mm apart
in a 3 × 3 matrix.
The ADA4312-1 evaluation board (EVAL-ADA4312-1ACPZ)
represents a robust example of an effective thermal management
approach (see Figure 19 and Figure 20).
For more information about thermal management, solder
assembly techniques for LFCSP packages, and important
package mechanical and materials information, refer to the
following link:
http://www.analog.com/en/technical-library/packages/csp-
chip-scale-package/lfcsp/index.html
POWER SUPPLY BYPASSING
The ADA4312-1 should be operated on a well-regulated single
+12 V power supply. Pay careful attention to power supply
decoupling. Use high quality capacitors with low equivalent series
resistance (ESR), such as multilayer ceramic capacitors (MLCCs),
to minimize supply voltage ripple and power dissipation.
Locate the 0.1 µF MLCC decoupling capacitor no more than
one-eighth of an inch away from the V
CC
supply pin. In addition,
a 10 µF tantalum capacitor is recommended to provide good
decoupling for lower frequency signals and to supply current for
fast, large signal changes at the ADA4312-1 outputs. Lay out
bypassing capacitors to keep return currents away from the
inputs of the amplifiers. A large ground plane provides a low
impedance path for the return currents.
Data Sheet ADA4312-1
Rev. A | Page 11 of 12
EVALUATION BOARD
11044-012
11044-011
Figure 19. Evaluation Board Top Layer Figure 20. Evaluation Board Bottom Layer

ADA4312-1ACPZ-RL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Buffers & Line Drivers WB Diff Hi Out Crnt Line Dvr w/ Shutdown
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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