LTC4001-1
5
40011fa
TYPICAL PERFORMANCE CHARACTERISTICS
Soft-Start (PWM Mode)
IDET Threshold vs R
IDET
for
R
PROG
= 549Ω
CHRG Pin Temperature Fault
Behavior (Detail)
PIN FUNCTIONS
BAT (Pin 1): Battery Charger Output Terminal. Connect a
10μF ceramic chip capacitor between BAT and PGND to
keep the ripple voltage small.
SENSE (Pin 2): Internal Sense Resistor. Connect to ex-
ternal inductor.
PGND (Pin 3): Power Ground.
GNDSENS (Pin 4): Ground Sense. Connect this pin to the
negative battery terminal. GNDSENS provides a Kelvin
connection for PGND and must be connected to PGND
schematically.
SW (Pin 5): Switch Node Connection. This pin connects
to the drains of the internal main and synchronous power
MOSFET switches. Connect to external inductor.
EN (Pin 6): Enable Input Pin. Pulling the EN pin high
places the LTC4001-1 into a low power state where the
BAT drain current drops to less than 3μA and the supply
current is reduced to less than 50μA. For normal opera-
tion, pull the pin low.
CHRG (Pin 7): Open-Drain Charge Status Output. When the
battery is being charged, CHRG is pulled low by an internal
N-channel MOSFET. When the charge current drops below
the IDET threshold (set by the R
IDET
programming resistor)
for more than 5milliseconds, the N-channel MOSFET turns
off and a 30μA current source is connected from CHRG to
ground. (This signal is latched and is reset by initiating a
new charge cycle.) When the timer runs out or the input
supply is removed, the current source will be disconnected
and the CHRG pin is forced to a high impedance state. A
temperature fault causes this pin to blink.
PV
IN
(Pin 8): Positive Supply Voltage Input. This pin con-
nects to the power devices inside the chip. V
IN
ranges
from 4V to 5.5V for normal operation. Operation down to
the undervoltage lockout threshold is allowed with cur-
rent limited wall adapters. Decouple with a 10μF or larger
surface mounted ceramic capacitor.
V
INSENSE
(Pin 9): Positive Supply Sense Input. This pin
connects to the inputs of all input comparators (UVL, V
IN
to V
BAT
). It also supplies power to the controller portion
of this chip. When the BATSENS pin rises to within 30mV
of V
INSENSE
, the LTC4001-1 enters sleep mode, dropping
I
IN
to 50μA. Tie this pin directly to the terminal of the PV
IN
decoupling capacitor.
FAULT (Pin 10): Battery Fault. This pin is a logic high if
a shorted battery is detected or if a temperature fault is
detected. A temperature fault occurs with the temperature
monitor circuit enabled and the thermistor temperature is
either below 0°C or above 50°C (typical).
0
INPUT
CURRENT (I
IN
)
0.5A/DIV
INDUCTOR
CURRENT (I
L
)
0.5A/DIV
SOFT-START
VOLTAGE (V
SS
)
1V/DIV
EN PIN (V
EN
)
5V/DIV
0
0
0
2ms/DIVV
BAT
= 3.5V
V
IN
= 5V
40011 G09
R
IDET
(Ω)
300
IDET (mA)
200
250
300
1100
40011 G10
150
100
0
500
700
900
400 1200
600
800
1000
50
400
350
CHRG
1V/DIV
TIME (20μs/DIV)
40011 G11
