7
LTC3402
3402fb
BLOCK DIAGRA
W
1
6
Σ
+
CURRENT
COMP
CURRENT
LIMIT
+
ERROR
AMP
FB
R1
R2
1.25V
V
C
2.8A TYP
1.25V – 9%
+
+
Burst Mode
CONTROL
+–
PWM
LOGIC
ANTICROSS
COND
ANTIRING
SLOPE COMP
OSC
R
t
GND
N
POK
SLEEP
+
8
V
OUT
V
OUT
2.6V TO 5.5V
7
4
9
MODE/SYNC
3402 BD
2
N
10mV
+
SW
1V TO
V
OUT
+ 0.3V
+
V
IN
P
3
+
5
SHDN SHUTDOWN
10
I
SENSE
AMP
I
ZERO
AMP
8
LTC3402
3402fb
APPLICATIO S I FOR ATIO
WUUU
DETAILED DESCRIPTION
The LTC3402 provides high efficiency, low noise power
for applications such as portable instrumentation. The
current mode architecture with adaptive slope compensa-
tion provides ease of loop compensation with excellent
transient load response. The low R
DS(ON)
, low gate charge
synchronous switches provide the pulse width modula-
tion control at high efficiency.
The Schottky diode across the synchronous PMOS switch
provides a lower drop during the break-before-make time
(typically 20ns) of the NMOS to PMOS transition. The
addition of the Schottky diode will improve efficiency (see
graph “Efficiency Loss Without Schottky vs Frequency”).
While the IC’s quiescent current is a low 38μA, high
efficiency is achieved at light loads when Burst Mode
operation is entered.
Low Voltage Start-Up
The LTC3402 is designed to start up at input voltages of
typically 0.85V. The device can start up under some load,
(see graph Start-Up vs Input Voltage). Once the output
voltage exceeds a threshold of 2.3V, then the IC powers
itself from V
OUT
instead of V
IN
. At this point, the internal
circuitry has no dependency on the input voltage, eliminat-
ing the requirement for a large input capacitor. The input
voltage can drop below 0.5V without affecting the opera-
tion, but the limiting factor for the application becomes the
availability of the power source to supply sufficient energy
to the output at the low voltages.
Low Noise Fixed Frequency Operation
Oscillator. The frequency of operation is set through a
resistor from the R
t
pin to ground where f = 3 • 10
10
/R
t
. An
internally trimmed timing capacitor resides inside the IC.
The oscillator can be synchronized with an external clock
inserted on the MODE/SYNC pin. When synchronizing the
oscillator, the free running frequency must be set to
approximately 30% lower than the desired synchronized
frequency. Keeping the sync pulse width below 2μs will
ensure that Burst Mode operation is disabled.
Current Sensing. Lossless current sensing converts the
peak current signal to a voltage to sum in with the internal
slope compensation. This summed signal is compared to
the error amplifier output to provide a peak current control
command for the PWM. The slope compensation in the IC
is adaptive to the input and output voltage. Therefore, the
converter provides the proper amount of slope compensa-
tion to ensure stability and not an excess causing a loss of
phase margin in the converter.
Error Amp. The error amplifier is a transconductance
amplifier with g
m
= 0.1ms. A simple compensation net-
work is placed from the V
C
pin to ground.
Current Limit. The current limit amplifier will shut the
NMOS switch off once the current exceeds its threshold.
The current amplifier delay to output is typically 50ns.
Zero Current Amp. The zero current amplifier monitors the
inductor current to the output and shuts off the synchro-
nous rectifier once the current is below 50mA, preventing
negative inductor current.
Antiringing Control. The anitringing control will place an
impedance across the inductor to damp the ringing on the
SW pin during discontinuous mode operation. The LC
SW
ringing (L = inductor, C
SW
= capacitance on the switch pin)
is low energy, but can cause EMI radiation.
Burst Mode Operation
Burst Mode operation is when the IC delivers energy to the
output until it is regulated and then goes into a sleep mode
where the outputs are off and the IC is consuming only
38μA. In this mode, the output ripple has a variable
frequency component with load current and the steady
state ripple will be typically below 3%.
During the period where the device is delivering energy to
the output, the peak current will be equal to 1/6 the current
limit value and the inductor current will terminate at zero
current for each cycle. In this mode the maximum output
current is given by:
I
V
V
Amps
OUT MAXBURST
IN
OUT
()
6
Burst Mode operation is user controlled by driving the
MODE/SYNC pin high to enable and low to disable. It is
recommended that Burst Mode operation be entered after
the part has started up.
9
LTC3402
3402fb
APPLICATIO S I FOR ATIO
WUUU
COMPONENT SELECTION
Inductor Selection
The high frequency operation of the LTC3402 allows the
use of small surface mount inductors. The minimum
inductance value is proportional to the operating fre-
quency and is limited by the following constraints:
L
f
H and L
VV V
f Ripple V
H
IN MIN OUT MAX IN MIN
OUT MAX
>
3
() ( ) ()
()
•–
••
where
f = Operating Frequency (Hz)
Ripple = Allowable Inductor Current Ripple (A)
V
IN(MIN)
= Minimum Input Voltage (V)
V
OUT(MAX)
= Maximum Output Voltage (V)
The inductor current ripple is typically set to 20% to 40%
of the maximum inductor current.
Figure 1. Recommended Component Placement. Traces
Carrying High Current Are Direct. Trace Area FB and V
C
Pins
Are Kept Low. Lead Length to Battery Should be Kept Short
Output Capacitor Selection
The output voltage ripple has several components. The
bulk value of the capacitor is set to reduce the ripple due
to charge into the capacitor each cycle. The max ripple due
to charge is given by:
VR
IV
CVf
V
BULK
PIN
OUT OUT
=
••
where
I
P
= Peak Inductor Current
The ESR can be a significant factor for ripple in most
power converters. The ripple due to capacitor ESR is
simply given by:
VR
CESR
= I
P
• R
ESR
V
where
R
ESR
= Capacitor Series Resistance
Low ESR capacitors should be used to minimize output
voltage ripple. For surface mount applications, AVX TPS
series tantalum capacitors and Sanyo POSCAP or Taiyo-
Yuden ceramic X5R or X7R type capacitors are recom-
mended. For through-hole applications Sanyo OS-CON
capacitors offer low ESR in a small package size. See Table
2 for a list of component suppliers. In some layouts it may
be required to place a 1μF low ESR capacitor as close to the
V
OUT
and GND pins as possible.
V
OUT
3402 F01
R
t
MODE
V
IN
SW
GND
SHDN
V
C
FB
V
OUT
POK
Table 1. Inductor Vendor Information
SUPPLIER PHONE FAX WEBSITE
Coilcraft (847) 639-6400 (847) 639-1469 www.coilcraft.com
Coiltronics (516) 241-7876 (516) 241-9339 www.coiltronics.com
Murata (814) 237-1431 (814) 238-0490 www.murata.com
(800) 831-9172
Sumida
USA: (847) 956-0666 (847) 956-0702 www.japanlink.com
Japan: 81-3-3607-5111 81-3-3607-5144 sumida
Table 2. Capacitor Vendor Information
SUPPLIER PHONE FAX WEBSITE
AVX (803) 448-9411 (803) 448-1943 www.avxcorp.com
Sanyo (619) 661-6322 (619) 661-1055 www.sanyovideo.com
Taiyo Yuden (408) 573-4150 (408) 573-4159 www.t-yuden.com
For high efficiency, choose an inductor with a high fre-
quency core material, such as ferrite, to reduce core
losses. The inductor should have low ESR (equivalent
series resistance) to reduce the I
2
R losses and must be
able to handle the peak inductor current without saturat-
ing. Molded chokes or chip inductors usually do not have
enough core to support the peak inductor currents in the
1A to 2A region. To minimize radiated noise, use a toroid,
pot core or shielded bobbin inductor. See Table 1 for
suggested components and Table 1 for a list of component
suppliers.

LTC3402EMS#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2A, 3MHz uP Sync Boost Conv
Lifecycle:
New from this manufacturer.
Delivery:
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