MMA1210
Sensors
Freescale Semiconductor 3
Table 2. Operating Characteristics
(Unless otherwise noted: –40°C ≤ T
A
≤ +105°C, 4.75 ≤ V
DD
≤ 5.25, Acceleration = 0g, Loaded output.
(1)
)
1. For a loaded output the measurements are observed after an RC filter consisting of a 1 kΩ resistor and a 0.01 μF capacitor to ground.
Characteristic Symbol Min Typ Max Unit
Operating Range
(2)
Supply Voltage
(3)
Supply Current
Operating Temperature Range
Acceleration Range
2. These limits define the range of operation for which the part will meet specification.
3. Within the supply range of 4.75 and 5.25 volts, the device operates as a fully calibrated linear accelerometer. Beyond these supply limits
the device may operate as a linear device but is not guaranteed to be in calibration.
V
DD
I
DD
T
A
g
FS
4.75
3.0
–40
—
5.00
—
—
112.5
5.25
6.0
+125
—
V
mA
C
g
Output Signal
Zero g (T
A
= 25°C, V
DD
= 5.0 V)
(4)
Zero g
Sensitivity (T
A
= 25°C, V
DD
= 5.0 V)
(5)
Sensitivity
Bandwidth Response
Nonlinearity
4. The device can measure both + and – acceleration. With no input acceleration the output is at midsupply. For positive acceleration the
output will increase above V
DD
/2 and for negative acceleration the output will decrease below V
DD
/2.
5. The device is calibrated at 35g.
V
OFF
V
OFF,V
S
S
V
f
–3dB
NL
OUT
2.35
0.46 V
DD
19
3.72
360
–1.0
2.5
0.50
V
DD
20.0
4.0
400
—
2.65
0.54 V
DD
21
4.28
440
1.0
V
V
mV/g
mV/g/V
Hz
% FSO
Noise
RMS (0.1–1 kHz)
Power Spectral Density
Clock Noise (without RC load on output)
(6)
6. At clock frequency ≅ 70 kHz.
n
RMS
n
PSD
n
CLK
—
—
—
—
110
2.0
2.8
—
—
mVrms
μV/(Hz
1/2
)
mVpk
Self-Test
Output Response
(7)
Input Low
Input High
Input Loading
(8)
Response Time
(9)
7. ΔV
OFF
calculated with typical sensitivity.
8. The digital input pin has an internal pull-down current source to prevent inadvertent self test initiation due to external board level leakages.
9. Time for the output to reach 90% of its final value after a self-test is initiated.
g
ST
V
IL
V
IH
I
IN
t
ST
55
V
SS
0.7 × V
DD
–30
—
75
—
—
–100
2.0
93
0.3 × V
DD
V
DD
–260
10
g
V
V
μA
ms
Status
(10), (11)
Output Low (I
load
= 100 μA)
Output High (I
load
= 100 μA)
10. The Status pin output is not valid following power-up until at least one rising edge has been applied to the self-test pin. The Status pin is
high whenever the self-test input is high, as a means to check the connectivity of the self-test and Status pins in the application.
11. The Status pin output latches high if a Low Voltage Detection or Clock Frequency failure occurs, or the EPROM parity changes to odd. The
Status pin can be reset low if the self-test pin is pulsed with a high input for at least 100 μs, unless a fault condition continues to exist.
V
OL
V
OH
—
V
DD
– 0.8
—
—
0.4
—
V
V
Minimum Supply Voltage (LVD Trip) V
LVD
2.7 3.25 4.0 V
Clock Monitor Fail Detection Frequency f
min
50 — 260 kHz
Output Stage Performance
Electrical Saturation Recovery Time
(12)
Full Scale Output Range (I
OUT
= 200 μA)
Capacitive Load Drive
(13)
Output Impedance
12. Time for amplifiers to recover after an acceleration signal causes them to saturate.
13. Preserves phase margin (60°) to guarantee output amplifier stability.
t
DELAY
V
FSO
C
L
Z
O
—
0.25
—
—
0.2
—
—
300
—
V
DD
–0.25
100
—
ms
V
pF
Ω
Mechanical Characteristics
Transverse Sensitivity
(14)
Package Resonance
14. A measure of the device's ability to reject an acceleration applied 90° from the true axis of sensitivity.
V
XZ,YZ
f
PKG
—
—
—
10
5.0
—
% FSO
kHz
