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74AVCH8T245BQ,118
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P26
74A
VCH8T245
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 201
2. All rights rese
rved.
Product data sheet
Rev
. 5
— 27 December 2012
18 of 25
NXP Semiconductors
74A
VCH8T245
8-bit dual supp
ly translatin
g transceiver;
3-st
ate
a.
LOW to HIGH propagation delay (An to Bn);
V
CC(A)
= 1.8 V
b.
HIGH to LOW propagation delay (An to
Bn);
V
CC(A)
= 1.8 V
c.
LOW to HIGH prop
agation delay (An to Bn);
V
CC(A)
= 2.5 V
d.
HIGH to LOW propagation delay (An to
Bn);
V
CC(A)
= 2.5 V
(1)
V
CC(B)
= 1.2 V
.
(2)
V
CC(B)
= 1.5 V
.
(3)
V
CC(B)
= 1.8 V
.
(4)
V
CC(B)
= 2.5 V
.
(5)
V
CC(B)
= 3.3 V
.
Fig 10.
T
ypical propagation delay vs load
capacit
ance; T
amb
= 25
C
C
L
(pF)
06
0
40
20
001aai481
3
5
7
t
PLH
(ns)
1
(1)
(2)
(3)
(5)
(4)
C
L
(pF)
06
0
40
20
001aai482
3
5
7
t
PHL
(ns)
1
(1)
(2)
(3)
(5)
(4)
C
L
(pF)
06
0
40
20
001aai483
3
5
7
t
PLH
(ns)
1
(1)
(2)
(3)
(5)
(4)
C
L
(pF)
06
0
40
20
001aai486
3
5
7
t
PHL
(ns)
1
(1)
(2)
(3)
(5)
(4)
74A
VCH8T245
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 201
2. All rights rese
rved.
Product data sheet
Rev
. 5
— 27 December 2012
19 of 25
NXP Semiconductors
74A
VCH8T245
8-bit dual supp
ly translatin
g transceiver;
3-st
ate
a.
LOW to HIGH propagation delay (An to Bn);
V
CC(A)
= 3.3 V
b.
HIGH to LOW propagation delay (An to
Bn);
V
CC(A)
= 3.3 V
(1)
V
CC(B)
= 1.2 V
.
(2)
V
CC(B)
= 1.5 V
.
(3)
V
CC(B)
= 1.8 V
.
(4)
V
CC(B)
= 2.5 V
.
(5)
V
CC(B)
= 3.3 V
.
Fig 1
1.
T
ypical propagation delay vs load
cap
acitance; T
amb
= 25
C
C
L
(pF)
06
0
40
20
001aai485
3
5
7
t
PLH
(ns)
1
(1)
(2)
(3)
(5)
(4)
C
L
(pF)
06
0
40
20
001aai484
3
5
7
t
PHL
(ns)
1
(1)
(2)
(3)
(5)
(4)
74A
VCH8T245
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 201
2. All rights rese
rved.
Product data sheet
Rev
. 5
— 27 December 2012
20 of 25
NXP Semiconductors
74A
VCH8T245
8-bit dual supp
ly translatin
g transceiver;
3-st
ate
13. Package
outline
Fig 12.
Package outline SOT355
-1 (TSSOP24)
UNIT
A
1
A
2
A
3
b
p
cD
(1)
E
(2)
(1)
eH
E
LL
p
QZ
y
w
v
θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
7.9
7.7
4.5
4.3
0.65
6.6
6.2
0.4
0.3
8
0
o
o
0.13
0.1
0.2
1
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT355-1
MO-153
99-12-27
03-02-19
0.25
0.5
0.2
w
M
b
p
Z
e
11
2
24
13
pin 1 index
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v
M
A
X
A
D
y
0
2.5
5 mm
scale
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
A
max.
1.1
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P26
74AVCH8T245BQ,118
Mfr. #:
Buy 74AVCH8T245BQ,118
Manufacturer:
Nexperia
Description:
Bus Transceivers 8BIT DUAL-SUP XCVR W/CONFIG VOLT 3-S
Lifecycle:
New from this manufacturer.
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