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74AVCH8T245PW:118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
74AVCH8T245 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 27 December 2012 9 of 25
NXP Semiconductors
74AVCH8T245
8-bit dual supply translating transceiver; 3-state
[1] V
CCO
is the supply voltage associated with the output port.
[2] V
CCI
is the supply voltage associated with the data input port.
[3] The bus hold circuit can sink at least the minimum low sustaining current at V
IL
max. I
BHL
should be measured after lowering V
I
to GND
and then raising it to V
IL
max.
[4] The bus hold circuit can source at least the minimum high sustaining current at V
IH
min. I
BHH
should be measured after raising V
I
to V
CC
and then lowering it to V
IH
min.
[5] An external driver must source at least I
BHLO
to switch this node from LOW to HIGH.
[6] An external driver must sink at least I
BHHO
to switch this node from HIGH to LOW.
[7] For I/O ports, the parameter I
OZ
includes the input leakage current.
I
CC
supply
current
A port; V
I
= 0 V or V
CCI
; I
O
= 0 A
V
CC(A)
= 0.8 V to 3.6 V;
V
CC(B)
= 0.8 V to 3.6 V
-10-55A
V
CC(A)
= 1.1 V to 3.6 V;
V
CC(B)
= 1.1 V to 3.6 V
-8-50A
V
CC(A)
= 3.6 V; V
CC(B)
= 0 V - 8 - 50 A
V
CC(A)
= 0 V; V
CC(B)
= 3.6 V 2-12 - A
B port; V
I
= 0 V or V
CCI
; I
O
= 0 A
V
CC(A)
= 0.8 V to 3.6 V;
V
CC(B)
= 0.8 V to 3.6 V
-10-55A
V
CC(A)
= 1.1 V to 3.6 V;
V
CC(B)
= 1.1 V to 3.6 V
-8-50A
V
CC(A)
= 3.6 V; V
CC(B)
= 0 V 2-12 - A
V
CC(A)
= 0 V; V
CC(B)
= 3.6 V - 8 - 50 A
A plus B port (I
CC(A)
+ I
CC(B)
);
I
O
=0A; V
I
=0 Vor V
CCI
;
V
CC(A)
= 0.8 V to 3.6 V;
V
CC(B)
= 0.8 V to 3.6 V
-20-70A
A plus B port (I
CC(A)
+ I
CC(B)
);
I
O
=0A; V
I
=0 Vor V
CCI
;
V
CC(A)
= 1.1 V to 3.6 V;
V
CC(B)
= 1.1 V to 3.6 V
-16-65A
Table 7. Static characteristics …continued
[1][2]
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Max Min Max
Table 8. Typical total supply current (I
CC(A)
+ I
CC(B)
)
V
CC(A)
V
CC(B)
Unit
0 V 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V
0 V 0 0.1 0.1 0.1 0.1 0.1 0.1 A
0.8 V 0.1 0.1 0.1 0.1 0.1 0.3 1.6 A
1.2 V 0.1 0.1 0.1 0.1 0.1 0.1 0.8 A
1.5 V 0.1 0.1 0.1 0.1 0.1 0.1 0.4 A
1.8 V 0.1 0.1 0.1 0.1 0.1 0.1 0.2 A
2.5 V 0.1 0.3 0.1 0.1 0.1 0.1 0.1 A
3.3 V 0.1 1.6 0.8 0.4 0.2 0.1 0.1 A
74AVCH8T245 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 27 December 2012 10 of 25
NXP Semiconductors
74AVCH8T245
8-bit dual supply translating transceiver; 3-state
10. Dynamic characteristics
[1] t
pd
is the same as t
PLH
and t
PHL
; t
dis
is the same as t
PLZ
and t
PHZ
; t
en
is the same as t
PZL
and t
PZH
.
[1] t
pd
is the same as t
PLH
and t
PHL
; t
dis
is the same as t
PLZ
and t
PHZ
; t
en
is the same as t
PZL
and t
PZH
.
Table 9. Typical dynamic characteristics at V
CC(A)
= 0.8 V and T
amb
= 25 C
[1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6
Symbol Parameter Conditions V
CC(B)
Unit
0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V
t
pd
propagation delay An to Bn 14.4 7.0 6.2 6.0 5.9 6.0 ns
Bn to An 14.4 12.4 12.1 11.9 11.8 11.8 ns
t
dis
disable time OE to An 16.2 16.2 16.2 16.2 16.2 16.2 ns
OE
to Bn 17.6 10.0 9.0 9.1 8.7 9.3 ns
t
en
enable time OE to An 21.9 21.9 21.9 21.9 21.9 21.9 ns
OE
to Bn 22.2 11.1 9.8 9.4 9.4 9.6 ns
Table 10. Typical dynamic characteristics at V
CC(B)
= 0.8 V and T
amb
= 25 C
[1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6
Symbol Parameter Conditions V
CC(A)
Unit
0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V
t
pd
propagation delay An to Bn 14.4 12.4 12.1 11.9 11.8 11.8 ns
Bn to An 14.4 7.0 6.2 6.0 5.9 6.0 ns
t
dis
disable time OE to An 16.2 5.9 4.4 4.2 3.1 3.5 ns
OE
to Bn 17.6 14.2 13.7 13.6 13.3 13.1 ns
t
en
enable time OE to An 21.9 6.4 4.4 3.5 2.6 2.3 ns
OE
to Bn 22.2 17.7 17.2 17.0 16.8 16.7 ns
74AVCH8T245 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 27 December 2012 11 of 25
NXP Semiconductors
74AVCH8T245
8-bit dual supply translating transceiver; 3-state
[1] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of the outputs.
[2] f
i
= 10 MHz; V
I
=GNDtoV
CC
; t
r
= t
f
= 1 ns; C
L
= 0 pF; R
L
= .
Table 11. Typical power dissipation capacitance at V
CC(A)
= V
CC(B)
and T
amb
= 25 C
[1][2]
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions V
CC(A)
= V
CC(B)
Unit
0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V
C
PD
power dissipation
capacitance
A port: (direction An to
Bn); output enabled
0.2 0.2 0.2 0.3 0.4 0.5 pF
A port: (direction An to
Bn); output disabled
0.2 0.2 0.2 0.3 0.4 0.5 pF
A port: (direction Bn to
An); output enabled
9 9 10 10 11 13 pF
A port: (direction Bn to
An); output disabled
0.6 0.6 0.6 0.7 0.7 0.8 pF
B port: (direction An to
Bn); output enabled
9 9 10 10 11 13 pF
B port: (direction An to
Bn); output disabled
0.6 0.6 0.6 0.7 0.7 0.8 pF
B port: (direction Bn to
An); output enabled
0.2 0.2 0.2 0.3 0.4 0.5 pF
B port: (direction Bn to
An); output disabled
0.2 0.2 0.2 0.3 0.4 0.5 pF
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74AVCH8T245PW:118

Mfr. #:
Buy 74AVCH8T245PW:118
Manufacturer:
Nexperia
Description:
Bus Transceivers Bus XCVR Single 8-CH 3-ST 16-Pin
Lifecycle:
New from this manufacturer.
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