NCV8877
www.onsemi.com
11
If the voltage across the current sense resistor exceeds the
over current threshold voltage the device enters over current
hiccup mode. The device will remain off for the hiccup time
and then go through the soft−start procedure.
UVLO
Input Undervoltage Lockout (UVLO) is provided to
ensure that unexpected behavior does not occur when VIN
is too low to support the internal rails and power the
controller. The IC will start up when enabled and VIN
surpasses the UVLO threshold plus the UVLO hysteresis
and will shut down when VIN drops below the UVLO
threshold or the part is disabled.
VDRV
An internal regulator provides the drive voltage for the
gate driver. Bypass with a ceramic capacitor to ground to
ensure fast turn on times. The capacitor should be between
0.1 mF and 1 mF, depending on switching speed and charge
requirements of the external MOSFET.
VDRV uses an internal linear regulator to charge the
VDRV bypass capacitor. VOUT must be decoupled at the IC
by a capacitor that is equal or larger in value than the VDRV
decoupling capacitor.
APPLICATION INFORMATION
Design Methodology
This section details an overview of the component selection
process for the NCV8877 in continuous conduction mode
boost. It is intended to assist with the design process but does
not remove all engineering design work. Many of the
equations make heavy use of the small ripple approximation.
This process entails the following steps:
1. Define Operational Parameters
2. Select Operating Frequency
3. Select Current Sense Resistor
4. Select Output Inductor
5. Select Output Capacitors
6. Select Input Capacitors
7. Select Compensator Components
8. Select MOSFET(s)
9. Select Diode
10. Design Notes
11. Determine Feedback Loop Compensation Network
1. Define Operational Parameters
Before beginning the design, define the operating
parameters of the application. These include:
V
IN(min)
: minimum input voltage [V]
V
IN(max):
maximum input voltage [V]
V
OUT
: output voltage [V]
I
OUT(max)
: maximum output current [A]
I
CL
: desired typical cycle-by-cycle current limit [A]
From this the ideal minimum and maximum duty cycles
can be calculated as follows:
D
min
+ 1 *
V
IN(max)
V
OUT
D
max
+ 1 *
V
IN(min)
V
OUT
Both duty cycles will actually be higher due to power loss
in the conversion. The exact duty cycles will depend on
conduction and switching losses. If the maximum input
voltage is higher than the output voltage, the minimum duty
cycle will be negative. This is because a boost converter
cannot have an output lower than the input. In situations
where the input is higher than the output, the output will
follow the input, minus the diode drop of the output diode
and the converter will not attempt to switch.
If the calculated D
max
is higher the D
max
of the NCV8877,
the conversion will not be possible. It is important for a boost
converter to have a restricted D
max
, because while the ideal
conversion ration of a boost converter goes up to infinity as
D approaches 1, a real converter’s conversion ratio starts to
decrease as losses overtake the increased power transfer. If
the converter is in this range it will not be able to regulate
properly.
If the following equation is not satisfied, the device will
skip pulses at high V
IN
:
D
min
f
s
w t
on(min)
Where: f
s
: switching frequency [Hz]
t
on(min)
: minimum on time [s]
2. Select Operating Frequency
The default setting is an open ROSC pin, allowing the
oscillator to operate at the default frequency F
s
. Adding a
resistor to GND increases the switching frequency.
The graph in Figure 17, below, shows the required
resistance to program the frequency. From 200 kHz to
500 kHz, the following formula is accurate to within 3% of
the expected
Figure 17. R
OSC
vs. F
SW
100
90
80
70
60
50
40
30
20
10
0
150 200 250 500450400350300
F
SW
(kHz)
R
OSC
(kW)
550
