LTC1876
22
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The value of the soft-start capacitor C
SS
may need to be
scaled with output voltage, output capacitance and load
current characteristics. The minimum soft-start capaci-
tance is given by:
C
SS
> (C
OUT
)(V
OUT
) (10
–4
) (R
SENSE
)
The minimum recommended soft-start capacitor of
C
SS
= 0.1µF will be sufficient for most applications.
Fault Conditions: Current Limit and Current Foldback
The LTC1876 step-down controllers current comparator
has a maximum sense voltage of 75mV resulting in a
maximum MOSFET current of 75mV/R
SENSE
. The maxi-
mum value of current limit generally occurs with the
largest V
IN
at the highest ambient temperature, conditions
that cause the highest power dissipation in the top MOSFET.
The controllers include current foldback to help further
limit load current when the output is shorted to ground.
The foldback circuit is active even when the overload
shutdown latch described above is overridden. If the
output falls below 70% of its nominal output level, then the
maximum sense voltage is progressively lowered from
75mV to 25mV. Under short-circuit conditions with very
low duty cycles, the step-down regulators will begin cycle
skipping in order to limit the short-circuit current. In this
situation the bottom MOSFET will be dissipating most of
the power but less than in normal operation. The short-
circuit ripple current is determined by the minimum on-
time t
ON(MIN)
(less than 200ns), the input voltage and
inductor value:
I
L(SC)
= t
ON(MIN)
(V
IN
/L)
The resulting short-circuit current is:
I
mV
R
I
SC
SENSE
LSC
=+
25 1
2
()
Fault Conditions: Overvoltage Protection (Crowbar)
The overvoltage crowbar is designed to blow a system
input fuse when the output voltage of the step-down
regulator rises much higher than nominal levels. The
crowbar causes huge currents to flow, that blow the fuse
to protect against a shorted top MOSFET if the short
occurs while the controller is operating.
A comparator monitors the output for overvoltage condi-
tions. The comparator (OV) detects overvoltage faults
greater than 7.5% above the nominal output voltage.
When this condition is sensed, the top MOSFET is turned
off and the bottom MOSFET is turned on until the overvolt-
age condition is cleared. The output of this comparator is
only latched by the overvoltage condition itself and will
therefore allow a switching regulator system having a poor
PC layout to function while the design is being debugged.
The bottom MOSFET remains on continuously for as long
as the OV condition persists; if V
OUT
returns to safe level,
normal operation automatically resumes. A shorted top
MOSFET will result in a high current condition which will
open the system fuse. The switching regulator will regu-
late properly with a leaky top MOSFET by altering the duty
cycle to accommodate the leakage.
The Standby Mode (STBYMD) Pin Function
The Standby Mode (STBYMD) pin provides several choices
for start-up and standby operational modes. If the pin is
pulled to ground, the RUN/SS pins for both controllers are
internally pulled to ground, preventing start-up and thereby
providing a single control pin for turning off both control-
lers at once. If the pin is left open or decoupled with a
capacitor to ground, the RUN/SS pins are each internally
provided with a starting current enabling external control
for turning on each controller independently. If the pin is
provided with a current of >3µA at a voltage greater than
2V, both internal linear regulators (INTV
CC
and 3.3V) will
be on even when both controllers are shut down. In this
mode, the onboard 3.3V and 5V linear regulators can
provide power to keep-alive functions such as a keyboard
controller. This pin can also be used as a latching “on” and/
or latching “off” power switch if so designed.
Frequency of Operation
The LTC1876 stepdown controllers have an internal volt-
age controlled oscillator. The frequency of this oscillator
can be varied over a 2 to 1 range. The pin is internally self-
biased at 1.19V, resulting in a free-running frequency of
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approximately 220kHz. The FREQSET pin can be grounded
to lower this frequency to approximately 140kHz or tied to
the INTV
CC
pin to yield approximately 310kHz. The FREQSET
pin may be driven with a voltage from 0 to INTV
CC
to fix or
modulate the oscillator frequency as shown in Figure 5.
Minimum On-Time Considerations
Minimum on-time t
ON(MIN)
is the smallest time duration
that the step down controller is capable of turning on the
top MOSFET. It is determined by internal timing delays and
the gate charge required to turn on the top MOSFET. Low
duty cycle applications may approach this minimum on-
time limit and care should be taken to ensure that.
t
V
Vf
ON MIN
OUT
IN
()
()
<
If the duty cycle falls below what can be accommodated by
the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for each controller is generally less
than 200ns. However, as the peak sense voltage decreases
the minimum on-time gradually increases up to about
300ns. This is of particular concern in forced continuous
applications with low ripple current at light loads. If the
duty cycle drops below the minimum on-time limit in this
situation, a significant amount of cycle skipping can occur
with correspondingly larger current and voltage ripple.
FCB Pin Operation
The FCB pin can be used to regulate a secondary winding
or as a logic level input. Continuous operation is forced
when the FCB pin drops below 0.8V. During continuous
mode, current flows continuously in the transformer pri-
mary. The secondary winding(s) draw current only when
the bottom, synchronous switch is on. When primary load
currents are low and/or the V
IN
/V
OUT
ratio is low, the
synchronous switch may not be on for a sufficient amount
of time to transfer power from the output capacitor to the
secondary load. Forced continuous operation will support
secondary windings providing there is sufficient
synchronous switch duty factor. Thus, the FCB input pin
removes the requirement that power must be drawn from
the inductor primary in order to extract power from the
auxiliary windings. With the loop in continuous mode, the
auxiliary outputs may nominally be loaded without regard
to the primary output load.
The secondary output voltage V
SEC
is normally set as
shown in Figure 6a by the turns ratio N of the transformer:
V
SEC
(N + 1) V
OUT
However, if the controller goes into Burst Mode operation
and halts switching due to a light primary load current,
then V
SEC
will droop. An external resistive divider from
V
SEC
to the FCB pin sets a minimum voltage V
SEC(MIN)
:
VV
R
R
SEC MIN()
.≈+
08 1
6
5
If V
SEC
drops below this level, the FCB voltage forces
temporary continuous switching operation until V
SEC
is
again above its minimum.
In order to prevent erratic operation if no external connec-
tions are made to the FCB pin, the FCB pin has a 0.18µA
internal current source pulling the pin high. Include this
current when choosing resistor values R5 and R6.
The following table summarizes the possible states avail-
able on the FCB pin:
Table 1
FCB Pin Condition
0V to 0.75V Forced Continuous (Current Reversal
Allowed—Burst Inhibited)
0.85V < V
FB
< 4.3V Minimum Peak Current Induces
Burst Mode Operation
No Current Reversal Allowed
Feedback Resistors Regulating a Secondary Winding
>4.8V Burst Mode Operation Disabled
Constant Frequency Mode Enabled
No Current Reversal Allowed
No Minimum Peak Current
Remember that both controllers are temporarily forced
into continuous mode when the FCB pin falls below 0.8V.
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Voltage Positioning
Voltage positioning can be used to minimize peak-to-peak
output voltage excursions under worst-case transient
loading conditions. The open loop DC gain of the control
loop is reduced depending upon the maximum load step
specifications. Voltage positioning can be easily added to
the LTC1876 by loading the I
TH
pin with a resistive divider
having a Thevenin equivalent voltage source equal to the
midpoint operating voltage of the error amplifier, or 1.2V
(see Figure 8).
The resistive load reduces the DC loop gain while main-
taining the linear control range of the error amplifier. The
maximum output voltage deviation can theoretically be
reduced to half or alternatively the amount of output
capacitance can be reduced for a particular application. A
complete explanation is included in Design Solutions 10.
(See: www.linear-tech.com)
1. The V
IN
current has two components: the first is the DC
supply current given in the Electrical Characteristics table,
which excludes MOSFET driver and control currents; the
second is the current drawn from the 3.3V linear regulator
output. V
IN
current typically results in a small (<0.1%)
loss.
2. INTV
CC
current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results from
switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high to
low again, a packet of charge dQ moves from INTV
CC
to
ground. The resulting dQ/dt is a current out of INTV
CC
that
is typically much larger than the control circuit current. In
continuous mode, I
GATECHG
=f(Q
T
+Q
B
), where Q
T
and Q
B
are the gate charges of the topside and bottom side
MOSFETs.
Supplying INTV
CC
power through the EXTV
CC
switch input
from an output-derived source will scale the V
IN
current
required for the driver and control circuits by a factor of
(Duty Cycle)/(Efficiency). For example, in a 20V to 5V
application, 10mA of INTV
CC
current results in approxi-
mately 3mA of V
IN
current. This reduces the mid-current
loss from 10% or more (if the driver was powered directly
from V
IN
) to only a few percent.
3. I
2
R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resistor,
and input and output capacitor ESR. In continuous mode
the average output current flows through L and R
SENSE
,
but is “chopped” between the topside MOSFET and the
synchronous MOSFET. If the two MOSFETs have approxi-
mately the same R
DS(ON)
, then the resistance of one
MOSFET can simply be summed with the resistances of L,
R
SENSE
and ESR to obtain I
2
R losses. For example, if each
R
DS(ON)
= 30m, R
L
= 50m, R
SENSE
= 10m and R
ESR
= 40m (sum of both input and output capacitance
losses), then the total resistance is 130m. This results in
losses ranging from 3% to 13% as the output current
increases from 1A to 5A for a 5V output, or a 4% to 20%
loss for a 3.3V output. Efficiency varies as the inverse
square of V
OUT
for the same external components and
output power level. The combined effects of increasingly
lower output voltages and higher currents required by
high performance digital systems is not doubling but
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TH
R
C
R
T1
INTV
CC
C
C
1876 F08
LTC1876
R
T2
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1876 circuits: 1) LTC1876 V
IN
current (in-
cluding loading on the 3.3V internal regulator), 2) INTV
CC
regulator current, 3) I
2
R losses, 4) topside MOSFET
transition losses.
Figure 8. Active Voltage Positioning Applied to the LTC1876

LTC1876EG#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2-phase,Dual Step-dn + Boost Reg
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