Obsolete Product(s) - Obsolete Product(s)
M5450, M5451
4/12
Table 2. Static Electrical Characteristics
(T
amb
within operating range, V
DD
= 4.75V to 13.2V, V
SS
= 0V, unless otherwise specified)
Note: 1. Output matching is calculated as the percent variation from I
MAX
+ I
MIN
/2.
2. With a fixed resistor on the brightness input some variation in brightness will occur from one device to another.
3. Absolute maximum for each output should be limited to 40mA.
4. The V
O
voltage should be regulated by the user. See Figure 7 and Figure 8 for allowable VO versus IO operation.
Figure 4. Input Data Format
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
DD
Supply Voltage 4.75 13.2 V
I
DD
Supply Current
V
DD
= 13.2V
7mA
V
I
Input Voltage Logical "0" Level ± 10µA Input Bias - 0.3 0.8 V
Logical "1" Level
4.75 ≤ V
DD
≤ 5.25
2.2
V
DD
V
V
DD
> 5.25 V
DD
- 2 V
DD
V
I
B
Brightness Input Current (note 2) 0 0.75 mA
V
B
Brightness Input Voltage (pin 19)
Input Current = 750µA, T
amb
= 25°C
34.3V
V
O(off)
Off State Out. Voltage 13.2 V
I
O
Out. Sink Current (note 3)
Segment OFF
V
O
= 3V
10 µA
Segment ON
V
O
= 1V (note 4)
Brightness In. = 0µA010µA
Brightness In. = 100µ 2 274mA
Brightness In. = 750µA121525mA
f
clock
Input Clock Frequency 0 0.5 MHz
I
O
Output Matching (note 1) ± 20 %
36
BIT 34
CLOCK
DATA
LOAD
(INTERNAL)
RESET
(INTERNAL)
START
BIT 1
1
BIT 35
