LT3991/LT3991-3.3/LT3991-5
7
3991fa
pin FuncTions
BD (Pin 1): This pin connects to the anode of the boost
diode. The BD pin is normally connected to the output.
BOOST (Pin 2): This pin is used to provide a drive volt
-
age, higher than the input voltage, to the internal bipolar
NPN power switch.
SW (Pin 3): The SW pin is the output of an internal power
switch. Connect this pin to the inductor, catch diode, and
boost capacitor.
V
IN
(Pin 4): The V
IN
pin supplies current to the LT3991’s
internal circuitry and to the internal power switch. This
pin must be locally bypassed.
EN (Pin 5): The part is in shutdown when this pin is low
and active when this pin is high. The hysteretic threshold
voltage is 1.005V going up and 0.975V going down. The EN
threshold is only accurate when V
IN
is above 4.3V. If V
IN
is
lower than 4.3V, ground EN to place the part in shutdown.
Tie to V
IN
if shutdown feature is not used.
FB (Pin 6, LT3991 Only): The LT3991 regulates the FB pin
to 1.19V. Connect the feedback resistor divider tap to this
pin. Also, connect a phase lead capacitor between FB and
V
OUT
. Typically this capacitor is 10pF.
V
OUT
(Pin 6, LT3991-3.3/LT3991-5 Only): The LT3991-
3.3 and LT3991-5 regulate the V
OUT
pin to 3.3V and 5V
respectively. This pin connects to the internal 10MΩ
feedback divider that programs the fixed output voltage.
SS (Pin 7): A capacitor and a series resistor are tied between
SS and ground to slowly ramp up the peak current limit
of the LT3991 on start-up. The soft-start capacitor is only
actively discharged when EN is low. The SS pin is released
when the EN pin goes high. Float this pin to disable soft-
start. The soft-start resistor has a typical value of 100k.
RT (Pin 8): A resistor is tied between RT and ground to
set the switching frequency.
Typical perForMance characTerisTics
Switching Waveforms;
Burst Mode Operation
Switching Waveforms; Full
Frequency Continuous Operation
T
A
= 25°C, unless otherwise noted.
Transient Load Response,
Load Current Stepped from
0.5A to 1A
10µs/DIV
3991 G25
V
OUT
100mV/
DIV
I
L
500mA/
DIV
V
IN
= 48V, V
OUT
= 3.3V
C
OUT
= 47µF
5µs/DIV
3971 G26
V
SW
5V/DIV
V
OUT
20mV/DIV
I
L
500mA/DIV
V
IN
= 48V, V
OUT
= 3.3V
I
LOAD
= 20mA
C
OUT
= 47µF
1µs/DIV
3971 G27
V
SW
5V/DIV
V
OUT
20mV/DIV
I
L
500mA/DIV
V
IN
= 48V, V
OUT
= 3.3V
I
LOAD
= 1A
C
OUT
= 47µF
LT3991/LT3991-3.3/LT3991-5
8
3991fa
block DiagraM
+
+
+
OSCILLATOR
200kHz TO 2MHz
Burst Mode
DETECT
V
C
CLAMP
V
C
SLOPE COMP
R
V
IN
V
IN
EN
BOOST
SW
SHDN
SWITCH
LATCH
SS
1µA
V
OUT
C2
C3
C4
L1
D1
BD
RT
R2
GND
ERROR AMP
R1
FB
R
T
C1
PG
1.09V
1V
S
Q
V
OUT
LT3991
ONLY
3991 BD
INTERNAL 1.19V REF
SYNC
R2 R1
Σ
+
SHDN
C5
C5
LT3991-3.3
LT3991-5
ONLY
pin FuncTions
PG (Pin 9): The PG pin is the open-drain output of an
internal comparator. PGOOD remains low until the FB pin
is within 9% of the final regulation voltage. PGOOD is
valid when the LT3991 is enabled and V
IN
is above 4.3V.
SYNC (Pin 10): This is the external clock synchronization
input. Ground this pin for low ripple Burst Mode operation
at low output loads. Tie to a clock source for synchroni
-
zation, which will include pulse-skipping at low output
loads. When in pulse-skipping mode, quiescent current
increases to 1.5mA.
GND (Exposed
Pad Pin 11): Ground. The exposed pad
must be soldered to PCB.
LT3991/LT3991-3.3/LT3991-5
9
3991fa
operaTion
The LT3991 is a constant frequency, current mode step-
down regulator. An oscillator, with frequency set by RT,
sets an RS flip-flop, turning on the internal power switch.
An amplifier and comparator monitor the current flowing
between the V
IN
and SW pins, turning the switch off when
this current reaches a level determined by the voltage at
V
C
(see Block Diagram). An error amplifier measures the
output voltage through an external resistor divider tied to
the FB pin and servos the V
C
node. If the error amplifiers
output increases, more current is delivered to the output;
if it decreases, less current is delivered. An active clamp
on the V
C
node provides current limit. The V
C
node is
also clamped by the voltage on the SS pin; soft-start is
implemented by generating a voltage ramp at the SS pin
using an external capacitor and resistor.
If the EN pin is low, the LT3991 is shut down and draws
700nA from the input. When the EN pin exceeds 1.01V,
the switching regulator will become active.
The switch driver operates from either V
IN
or from the
BOOST pin. An external capacitor is used to generate a
voltage at the BOOST pin that is higher than the input
supply. This allows the driver to fully saturate the internal
bipolar NPN power switch for efficient operation.
To further optimize efficiency, the LT3991 automatically
switches to Burst Mode operation in light load situations.
Between bursts, all circuitry associated with controlling
the output switch is shut down, reducing the input supply
current to 1.7μA. In a typical application, 2.8μA will be con
-
sumed from the supply when regulating with no load.
The oscillator reduces the L
T3991’
s operating frequency
when the voltage at the FB pin is low. This frequency
foldback helps to control the output current during start-
up and overload.
The LT3991 contains a power good comparator which
trips when the FB pin is at 91% of its regulated value. The
PG output is an open-drain transistor that is off when the
output is in regulation, allowing an external resistor to pull
the PG pin high. Power good is valid when the LT3991 is
enabled and V
IN
is above 4.3V.
applicaTions inForMaTion
Achieving Ultralow Quiescent Current
To enhance efficiency at light loads, the LT3991 operates
in low ripple Burst Mode, which keeps the output capacitor
charged to the desired output voltage while minimizing
the input quiescent current. In Burst Mode operation the
LT3991 delivers single pulses of current to the output ca
-
pacitor followed by sleep periods where the output power
is supplied by the output capacitor. When in sleep mode
the LT3991 consumes 1.7μA, but when it turns on all the
circuitry to deliver a current pulse, the LT3991 consumes
1.5mA of input current in addition to the switch current.
Therefore, the total quiescent current will be greater than
1.7μA when regulating.
As the output load decreases, the frequency of single cur
-
rent pulses decreases (see Figure 1) and the percentage
of time the L
T3991 is in sleep mode increases, resulting
in much higher light load efficiency
. By maximizing the
time between pulses, the converter quiescent current
gets closer to the 1.7μA ideal. Therefore, to optimize the
Figure 1. Switching Frequency in Burst Mode Operation
quiescent current performance at light loads, the current
in the feedback resistor divider and the reverse current
in the catch diode must be minimized, as these appear
to the output as load currents. Use the largest possible
feedback resistors and a low leakage Schottky catch diode
in applications utilizing the ultralow quiescent current
LOAD CURRENT (mA)
SWITCHING FREQUENCY (kHz)
3991 F01
1000
200
400
600
800
0
0
120
10080604020
V
IN
= 12V
V
OUT
= 3.3V

LT3991IDD#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 55V, 1.2A, 2MHz Step-Down Regulator with 2.8uA Quiescent Current
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union