IRU3048
7
Rev. 1.7
09/12/02
www.irf.com
For Di1=25% of I1, we get L1=9.9mH
For Di2=25% of I2, we get: L2=5.7mH
Panasonic provides a range of inductors in different val-
ues and low profile for large currents.
For L1 choose ETQP6F102HFA (10.2mH, 4A)
For L2 choose ELLATV6R8M (6.8mH, 4A)
Power MOSFET Selection
The selections criteria to meet power transfer require-
ments is based on maximum drain-source voltage (VDSS),
gate-source drive voltage (VGS), maximum output cur-
rent, On-resistance RDS(ON) and thermal management.
The MOSFET must have a maximum operating voltage
(VDSS) exceeding the maximum input voltage (VIN).
The gate drive requirement is almost the same for both
MOSFETs. Caution should be taken with devices at very
low VGS to prevent undesired turn-on of the complemen-
tary MOSFET, which results a shoot-through current.
The total power dissipation for MOSFETs includes con-
duction and switching losses. For the Buck converter
the average inductor current is equal to the DC load cur-
rent. The conduction loss is defined as:
The total conduction loss is defined as:
The RDS(ON) temperature dependency should be consid-
ered for the worst case operation. This is typically given
in the MOSFET data sheet. Ensure that the conduction
losses and switching losses do not exceed the package
ratings or violate the overall thermal budget.
For this design, IRF7313 is a good choice. These de-
vices provide low on-resistance in a compact SOIC 8-
Pin package.
The MOSFETs have the following data:
The total conduction losses for channel 1 is:
The total conduction losses for channel 2 is:
The control MOSFET contributes to the majority of the
switching losses in synchronous Buck converter. The
synchronous MOSFET turns on under zero-voltage con-
dition, therefore the turn on losses for synchronous
MOSFET can be neglected. With a linear approxima-
tion, the total switching loss can be expressed as:
Figure 4 - Switching time waveforms.
From IRF7313 data sheet we obtain:
These values are taken under a certain condition test.
For more detail please refer to the IRF7313 data sheet.
By using equation (6), we can calculate the switching
losses.
PCON1 = 1.1W
PCON2 = 1.1W
IRF7313
VDSS = 30V
ID = 5.2A @ 708C
RDS(ON) = 46mV @ VGS=4.5V
q = 1.5 for 1508C (Junction Temperature)
Where:
VDS(OFF) = Drain to Source Voltage at off time
tr = Rise Time
tf = Fall Time
T = Switching Period
ILOAD = Load Current
PSW = 3 3 ILOAD ---(6)
VDS(OFF)
2
tr + tf
T
2
2
PCOND(Upper Switch) = ILOAD3RDS(ON)3D3q
PCOND(Lower Switch) = ILOAD3RDS(ON)3(1 - D)3q
q = RDS(ON) Temperature Dependency
PCON(TOTAL)=PCON(Upper Switch)q+PCON(Lower Switch)q
IRF7313
tr = 13ns
tf = 26ns
PSW1 = 187.2mW
PSW2 = 78mW
V
DS
V
GS
10%
90%
t
d
(ON)
t
d
(OFF)
t
r
t
f
8
Rev. 1.7
09/12/02
IRU3048
www.irf.com
Feedback Compensation
The IRU3048 is a voltage mode controller; the control
loop is a single voltage feedback path including error
amplifier and error comparator. To achieve fast transient
response and accurate output regulation, a compensa-
tion circuit is necessary. The goal of the compensation
network is to provide a closed loop transfer function with
the highest 0dB crossing frequency and adequate phase
margin (greater than 458).
The output LC filter introduces a double pole, –40dB/
decade gain slope above its corner resonant frequency,
and a total phase lag of 1808 (see Figure 5). The Reso-
nant frequency of the LC filter is expressed as follows:
Figure 5 shows gain and phase of the LC filter. Since we
already have 1808 phase shift just from the output filter,
the system risks being unstable.
Figure 5 - Gain and phase of LC filter.
The IRU3048's error amplifier is a differential-input
transconductance amplifier. The output is available for
DC gain control or AC phase compensation.
The E/A can be compensated with or without the use of
local feedback. When operated without local feedback
the transconductance properties of the E/A become evi-
dent and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC circuit
from Comp1 pin to ground as shown in Figure 6.
The ESR zero of the LC filter expressed as follows:
Figure 6 - Compensation network without local
feedback and its asymptotic gain plot.
The transfer function (Ve / VOUT) is given by:
The (s) indicates that the transfer function varies as a
function of frequency. This configuration introduces a gain
and zero, expressed by:
The gain is determined by the voltage divider and E/A's
transconductance gain.
First select the desired zero-crossover frequency (Fo):
Use the following equation to calculate R4:
FO1 > FESR and FO1 [ (1/5 ~ 1/10)3 fS
V
OUT
V
REF
R
8
R
6
R
9
C
18
Ve
E/A
F
Z
H(s) dB
Frequency
Gain(dB)
Fb
Comp
FLC = ---(7)
1
2p Lo3Co
FESR = ---(8)
1
2p 3 ESR 3 Co
H(s) = gm 3 3 ---(9)
R8
R6 + R8
1 + sR9C18
sC18
( )
|H(s)| = gm 3 3 R9 ---(10)
FZ = ---(11)
1
2p 3 R9 3 C18
R8
R6 3 R8
R9 =
---(12)
VOSC
VIN1
FO1 3FESR1
FLC1
2
R8 + R6
R8
1
gm
3 33
Where:
VIN1 = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
FO1 = Crossover Frequency for the master E/A
FESR1 = Zero Frequency of the Output Capacitor
FLC1 = Resonant Frequency of Output Filter
gm = Error Amplifier Transconductance
R8 and R6 = Resistor Dividers for Output Voltage
Programming
Gain
F
LC
0dB
Phase
0
8
F
LC
-180
8
Frequency
Frequency
-40dB/decade
IRU3048
9
Rev. 1.7
09/12/02
www.irf.com
This results to R9=46.4KV; Choose R9=46.4KV
To cancel one of the LC filter poles, place the zero be-
fore the LC filter resonant frequency pole:
Using equations (11) and (13) to calculate C9, we get:
Using equations (11),(12) and (13) for Ch2, where:
We get:
R11 = 38.9KV; Choose R11 = 39.2KV
C19 = 1554pF; Choose C19 = 1800pF
One more capacitor is sometimes added in parallel with
C9 and R4. This introduces one more pole which is mainly
used to supress the switching noise. The additional pole
is given by:
The pole sets to one half of switching frequency which
results in the capacitor CPOLE:
For a general solution for unconditionally stability for any
type of output capacitors, in a wide range of ESR values
we should implement local feedback with a compensa-
tion network. The typically used compensation network
for voltage-mode controller is shown in Figure 7.
C9 = 1630pF; Choose C9 = 1800pF
VIN2 = 5V
VOSC = 1.25V
FO2 = 30KHz
FESR2 = 26.5KHz
FLC2 = 3.5KHz
R15 = 1K
R14 = 442V
gm = 600mhmo
FZ 75%FLC1
FZ 0.75 3
1
2p L3 3 CO
---(13)
For:
L3 = 10.2mH
Co = 300mF
Fz = 2.1KHz
R9 = 46.4KV
Figure 7 - Compensation network with local
feedback and its asymptotic gain plot.
In such configuration, the transfer function is given by:
The error amplifier gain is independent of the transcon-
ductance under the following condition:
By replacing ZIN and Zf according to figure 7, the trans-
former function can be expressed as:
As known, transconductance amplifier has high imped-
ance (current source) output, therefore, consider should
be taken when loading the E/A output. It may exceed its
source/sink output current capability, so that the ampli-
fier will not be able to swing its output voltage over the
necessary range.
The compensation network has three poles and two ze-
ros and they are expressed as follows:
Ve
1 - gmZf
1 + gmZIN
VOUT
=
CPOLE =
p 3 R9 3 fS -
1
C18
1
1
p 3 R9 3 fS
For FP <<
fS
2
FP =
2p 3 R9 3
C18 3 CPOLE
C18 + CPOLE
1
V
OUT
V
REF
R
5
R
6
R
8
C
10
C
12
C
11
R
7
Ve
F
Z
1
F
Z
2
F
P
2
F
P
3
E/A
Z
f
Z
IN
Frequency
Gain(dB)
H(s) dB
Fb
Comp
gmZf >> 1 and gmZIN >>1 ---(14)
For:
VIN1 = 12V
VOSC = 1.25V
FO1 = 30KHz
FESR1 = 26.5KHz
FLC1 = 2.8KHz
R8 = 1K
R6 = 1.64K
gm = 600mmho
H(s)=
sR6(C12+C11 )
1+sR7 3(1+sR8C10)
1 (1+sR7C11 )3[1+sC10(R6+R8)]
3
C12C11
C12+C11
[ ( )]
FP1 = 0
1
2p3C103(R6 + R8)
FZ2 =
1
2p3C103R6
FZ1 =
1
2p3R73C11
FP3 =
1
2p3R73
FP2 =
1
2p3R83C10
1
2p3R73C12
C123C11
C12+C11
( )

IRU3048CFTR

Mfr. #:
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Infineon Technologies
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IC REG TRPL BCK/LNR SYNC 16TSSOP
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