XCR3256XL 256 Macrocell CPLD
12 www.xilinx.com DS013 (v2.7) March 31, 2006
Product Specification
R
Warranty Disclaimer
THESE PRODUCTS ARE SUBJECT TO THE TERMS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED
AT http://www.xilinx.com/warranty.htm
. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF THE
PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE
THEN-CURRENT XILINX DATA SHEET FOR THE PRODUCTS. PRODUCTS ARE NOT DESIGNED TO BE FAIL-SAFE
AND ARE NOT WARRANTED FOR USE IN APPLICATIONS THAT POSE A RISK OF PHYSICAL HARM OR LOSS OF
LIFE. USE OF PRODUCTS IN SUCH APPLICATIONS IS FULLY AT THE RISK OF CUSTOMER SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Additional Information
CoolRunner XPLA3 Data Sheets and Application Notes
Device Package User Guide
Device Packages
Revision History
The following table shows the revision history for this document
XCR3256XL-12FT256C 12 ns FT256 256-ball Fine-Pitch BGA (FT) C
XCR3256XL-12CS280C 12 ns CS280 280-ball Chip Scale Package (CSP) C
XCR3256XL-12CSG280C 12 ns CSG280 280-ball Chip Scale Package (CSP); Pb-Free C
XCR3256XL-12TQ144I 12 ns TQ144 144-pin Thin Quad Flat Pack (TQFP) I
XCR3256XL-12TQG144I 12 ns TQG144 144-pin Thin Quad Flat Pack (TQFP); Pb-Free I
XCR3256XL-12PQ208I 12 ns PQ208 208-pin Plastic Quad Flat Pack (PQFP) I
XCR3256XL-12PQG208I 12 ns PQG208 208-pin Plastic Quad Flat Pack (PQFP); Pb-Free I
XCR3256XL-12FT256I 12 ns FT256 256-ball Fine-Pitch BGA (FT) I
XCR3256XL-12CS280I 12 ns CS280 280-ball Chip Scale Package (CSP) I
XCR3256XL-12CSG280I 12 ns CSG280 280-ball Chip Scale Package (CSP); Pb-Free I
Notes:
1. C = Commercial: T
A
= 0° to +70°C; I = Industrial: T
A
= –40° to +85°C
Device Ordering and
Part Marking Number
Speed
(pin-to-pin
delay)
Pkg.
Symbol
No. of
Pins Package Type
Operating
Range
(1)
Date Version Revision
01/21/00 1.0 Initial Xilinx release.
02/10/00 1.1 Updated Pinout table.
05/03/00 1.2 Minor updates and added Boundary Scan to pinout table.
11/20/00 1.3 Updated pinout tables; corrected note in Tab le 4 to read: "port enable pin is brought High".
12/11/00 1.4 Updated specifications and pinout tables.
01/17/01 1.5 Removed Timing Model.
03/05/01 1.6 Added 256-ball Fine-Pitch Ball Grid Array Package.
04/11/01 1.7 Added Typical I/V curve, Figure 2; added Table 2: Total User I/O; changed V
OH
spec.
04/19/01 1.8 Updated Typical I/V curve, Figure 2: added voltage levels.