1
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AN1210.0
PRELIMINARY
ISL9000EV2 User Manual
Description
The ISL9000EV2 board is designed for customers’ use in
exploring the operation of the ISL9000 Low Dropout
Regulator IC (LDO). In this capacity, it provides an easy to
use platform for testing most of the datasheet specifications
and functionalities. It is designed to show the small space
required for all the components, while providing room to
access the signals.
The layout is intended to minimize thermal effects, to better
evaluate current limits and voltage regulation accuracy. In an
actual implementation, the area for heat sinking may be
smaller, so thermal effects may make the operation slightly
different.
The ISL9000EV2 board constitutes a complete dual voltage
regulator solution. The PCB board is 2 inches by 3 inches,
however, the actual charger components easily fit within a
0.9 x 1.6 cm area (components on one side), demonstrating
the space saving advantage of the ISL9000 in limited space
applications.
A voltage source can be connected to the two pin connector
(J2, default) or to the banana jacks (not populated). For
monitoring the output, test instruments can be connected to
the five pin connector (J13, default) or to the banana jacks or
scope probe jacks (not populated). Additional test points
provide a convenient way to monitor the POR outputs and
the signal on the bypass capacitor. This can be especially
important when testing the LDO in a temperature chamber.
Several ground pins provide reference points for test leads.
Additional “kelvin” test points are provided for VIN, VO1,
VO2, and GND to monitor the actual performance of the IC.
This removes the voltage drops across the PCB traces that
occurs at higher currents.
The board has a jumper block for enabling each of the two
LDO outputs. A shunt can be placed on J3 or J4 between
“ENx” and “LOW” pins to provide a 100kΩ pull down on each
EN pin of the device. If J3 or J4 ”HI” pins are floating, the
respective LDO output will be off, while connecting “HI” to
“ENx” will enable the output.
When it is desired that an LDO always be enabled, connect
a shunt between “ENx” and “HI” on J3 or J4. In this case the
shunt between “ENx” and “LOW” is not needed.
If an external enable signal that drives both high and low is
used to enable the LDO outputs, both shunts can be
removed from ENx.
A jumper (J10) connects the CPOR input to a 10nF capacitor
for POR timing. The jumper can be removed and replaced
by a different capacitor to ground for different power on
timing requirements.
The board also provides a connector (JP1, not populated)
which can connect to a logic analyser/pattern generator for
controlling and monitoring the output response. The
connector provides both enable inputs and POR outputs.
Finally, a daughter card connector and a jumper (J14 and J9,
not populated) allow specially assembled boards containing
untrimmed LDOs to be programmed to custom voltage
levels after board assembly. This is done at the factory, so
no additional information will be provided in this document.
Features
• Complete dual low dropout regulator (LDO)
• Easy to use board for evaluation of the LDO in a target
application.
• Exposed soldering pads/pins for monitoring VIN, VO1,
VO2, POR1, POR2, and CBYP.
• Voltage monitoring using test pins, banana jacks and
scope jacks.
• Enable jumpers for each supply, plus jumpered enable pull
down resistors.
• The board has options for:
- Changing the CPOR capacitor
- Using a logic analyser/pattern generator to monitor
enable/POR response.
Ordering Information
PART NUMBER DESCRIPTION
ISL9000NJEV2 ISL9000NJ Evaluation board [3.3V/2.8V]
ISL9000NFEV2 ISL9000NF Evaluation board [3.3V/2.5V]
ISL9000KKEV2 ISL9000KK Evaluation board [2.85V/2.85V]
ISL9000KJEV2 ISL9000KJ Evaluation board [2.85V/2.8V]
ISL9000KFEV2 ISL9000KF Evaluation board [2.85V/2.5V]
ISL9000JBEV2 ISL9000JB Evaluation board [2.8V/1.5V]
ISL9000FJEV2 ISL9000FJ Evaluation board [2.5V/2.8V]
ISL9000KCEV2 ISL9000KC Evaluation board [2.85V/1.8V]
ISL9000BJEV2 ISL9000BJ Evaluation board [1.5V/2.8V]
ISL9000PLEV2 ISL9000PL Evaluation board [1.85V/2.9V]
ISL9000GCEV2 ISL9000GC Evaluation board [2.7V/1.8V]
ISL9000JCEV2 ISL9000JC Evaluation board [2.8V/1.8V]
ISL9000JREV2 ISL9000JR Evaluation board [2.8V/2.6V]
ISL9000JMEV2 ISL9000JM Evaluation board [2.8V/3.0V]
ISL9000LLEV2 ISL9000LL Evaluation board [2.9V/2.9V]
ISL9000MMEV2 ISL9000MM Evaluation board [3.0V/3.0V]
Application Note October 5, 2005
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
